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authorntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-08-07 18:42:14 +0000
committerntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-08-07 18:42:14 +0000
commit1d5623919bcafc2add41f6c67ce6c5fcc7ecc3d3 (patch)
tree8117d4668a13b51213e12a2b4400a3524b4de96f /src/target/target/aduc702x.cfg
parentc76b0618d7457a68b464a64e91ed98dc2482b262 (diff)
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- added svn props for newly added files
git-svn-id: svn://svn.berlios.de/openocd/trunk@899 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/target/aduc702x.cfg')
-rw-r--r--src/target/target/aduc702x.cfg76
1 files changed, 38 insertions, 38 deletions
diff --git a/src/target/target/aduc702x.cfg b/src/target/target/aduc702x.cfg
index 4269f38a..fdffbfea 100644
--- a/src/target/target/aduc702x.cfg
+++ b/src/target/target/aduc702x.cfg
@@ -1,38 +1,38 @@
-## -*- tcl -*-
-##
-
-# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
-# Don't really need them anyways.
-reset_config none
-
-## JTAG scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
-
-##
-## Target configuration
-##
-target arm7tdmi little 0
-
-## software initiated reset (if your SRST isn't wired)
-#proc target_0_reset {} { mwb 0x0ffff0230 04 }
-
-# use top 1k of SRAM for as temporary JTAG memory
-#working_area 0 0x11C00 0x400 backup
-
-## flash configuration
-## AdUC702x not yet spported :(
-
-## If you use the watchdog, the following code makes sure that the board
-## doesn't reboot when halted via JTAG. Yes, on the older generation
-## AdUC702x, timer3 continues running even when the CPU is halted.
-
-proc watchdog_service {} {
- global watchdog_hdl
- mww 0xffff036c 0
-# puts "watchdog!!"
- set watchdog_hdl [after 500 watchdog_service]
-}
-
-proc target_0_post_halt {} { watchdog_service }
-proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }
+## -*- tcl -*-
+##
+
+# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
+# Don't really need them anyways.
+reset_config none
+
+## JTAG scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+##
+## Target configuration
+##
+target arm7tdmi little 0
+
+## software initiated reset (if your SRST isn't wired)
+#proc target_0_reset {} { mwb 0x0ffff0230 04 }
+
+# use top 1k of SRAM for as temporary JTAG memory
+#working_area 0 0x11C00 0x400 backup
+
+## flash configuration
+## AdUC702x not yet spported :(
+
+## If you use the watchdog, the following code makes sure that the board
+## doesn't reboot when halted via JTAG. Yes, on the older generation
+## AdUC702x, timer3 continues running even when the CPU is halted.
+
+proc watchdog_service {} {
+ global watchdog_hdl
+ mww 0xffff036c 0
+# puts "watchdog!!"
+ set watchdog_hdl [after 500 watchdog_service]
+}
+
+proc target_0_post_halt {} { watchdog_service }
+proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }