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authoroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-08-07 16:37:20 +0000
committeroharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-08-07 16:37:20 +0000
commitc76b0618d7457a68b464a64e91ed98dc2482b262 (patch)
tree05cc3e57e9413d4e43908ceec7e678470f536fc5 /src/target/target/aduc702x.cfg
parent2cec23fc3761b2f7d978851eef62c4a291a0f18f (diff)
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David Kuehling <dvdkhlng@gmx.de> - added jim-eventloop.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@898 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/target/aduc702x.cfg')
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diff --git a/src/target/target/aduc702x.cfg b/src/target/target/aduc702x.cfg
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+## -*- tcl -*-
+##
+
+# This is for the case that TRST/SRST is not wired on your JTAG adaptor.
+# Don't really need them anyways.
+reset_config none
+
+## JTAG scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+##
+## Target configuration
+##
+target arm7tdmi little 0
+
+## software initiated reset (if your SRST isn't wired)
+#proc target_0_reset {} { mwb 0x0ffff0230 04 }
+
+# use top 1k of SRAM for as temporary JTAG memory
+#working_area 0 0x11C00 0x400 backup
+
+## flash configuration
+## AdUC702x not yet spported :(
+
+## If you use the watchdog, the following code makes sure that the board
+## doesn't reboot when halted via JTAG. Yes, on the older generation
+## AdUC702x, timer3 continues running even when the CPU is halted.
+
+proc watchdog_service {} {
+ global watchdog_hdl
+ mww 0xffff036c 0
+# puts "watchdog!!"
+ set watchdog_hdl [after 500 watchdog_service]
+}
+
+proc target_0_post_halt {} { watchdog_service }
+proc arget_0_pre_resume {} { global watchdog_hdl; after cancel $watchdog_hdl }