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author | duane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-11-30 22:25:43 +0000 |
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committer | duane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-11-30 22:25:43 +0000 |
commit | a28eaa85f73759bb189a46308642502c9fa5aa4b (patch) | |
tree | 93ed39ee8fe48131e227a01a788be91b88203064 /src/target/target/imx27.cfg | |
parent | 91afc3dc3083a3d4f6a4104a5132d87c8ec03c7f (diff) | |
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jtag newtap change & huge manual update
git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/target/imx27.cfg')
-rw-r--r-- | src/target/target/imx27.cfg | 44 |
1 files changed, 37 insertions, 7 deletions
diff --git a/src/target/target/imx27.cfg b/src/target/target/imx27.cfg index c6fdf41c..240a8498 100644 --- a/src/target/target/imx27.cfg +++ b/src/target/target/imx27.cfg @@ -1,12 +1,42 @@ #use combined on interfaces or targets that can't set TRST/SRST separately reset_config trst_and_srst -# There are 2 taps on the chip: -# The ETM -jtag_device 4 0x1 0xf 0xe -# The ARM926EJS -jtag_device 4 0x1 0xf 0xe +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx27 +} -# Note above there are 2 taps (#0 and #1) the ARM926 is the 2nd tap (ie #1) -target create target0 arm926ejs -endianess little -chain-position 1 -variant arm926ejs +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Note above there are 2 taps + +# The bs tap +if { [info exists BSTAPID ] } { + set _BSTAPID $BSTAPID +} else { + set _BSTAPID 0x1b900f0f +} +jtag newtap $_CHIPNAME bs -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_BSTAPID + +# The CPU tap +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x07926121 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +# Create the GDB Target. +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs +$_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 -work-area-size 0x8000 -work-area-backup 1 +# Internal to the chip, there is 45K of SRAM +# + +arm7_9 dcc_downloads enable |