Revert "target: add target->type->has_mmu fn"

This patch introduced a bug preventing flash writes from working
on Cortex-M3 targets like the STM32.  Moreover, it's the wrong
approach for handling no-MMU targets.

The right way to handle no-MMU targets is to provide accessors
for physical addresses, and use them everywhere; and any code
which tries to work with virtual-to-physical mappings should use
a identity mapping (which can be defaulted).

And ... we can tell if a target has an MMU by seeing if it's
got an mmu() method.  No such methood means no MMU.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

1 files changed, 0 insertions, 8 deletions

diff --git a/src/target/target_type.h b/src/target/target_type.h
index 23ed40e0..dd469db1 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -199,16 +199,8 @@ struct target_type_s
 	 */
 	int (*write_phys_memory)(struct target_s *target, uint32_t phys_address, uint32_t size, uint32_t count, uint8_t *buffer);
 
-	/* returns true if the mmu is enabled. Default implementation returns error. */
 	int (*mmu)(struct target_s *target, int *enabled);
 
-	/* returns true if the target has an mmu. This can only be
-	determined after the target has been examined.
-	
-	Default implementation returns success and has_mmu==true.
-	*/
-	int (*has_mmu)(struct target_s *target, bool *has_mmu);
-
 	/* Read coprocessor - arm specific. Default implementation returns error. */
 	int (*mrc)(struct target_s *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);