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| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-08-02 13:21:21 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-08-02 13:21:21 +0200 |
| commit | d1638abd6a67ea028a3896c356af3fe135c719c7 (patch) | |
| tree | 1e63f3ca8a62ad03a65059305733c7695dd9406e /tcl/target | |
| parent | 6ed9ab5b58a121ace24620b2efb830412acf7599 (diff) | |
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lpc1768: even if rclk "works", it isn't necessarily the correct clk
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/lpc1768.cfg | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index 88827fa1..ff92e4a7 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -50,8 +50,12 @@ flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ # JTAG clock should be CCLK/6 (unless using adaptive clocking) # CCLK is 4 MHz after reset, and until board-specific code (like # a reset-init handler) speeds it up. -jtag_rclk [ expr 4000 / 6 ] -$_TARGETNAME configure -event reset-start { jtag_rclk [ expr 4000 / 6] } +# +# Although rclk "appears to work", it turns out that this yields +# 4MHz whereas the "correct" rate is CCLK/6, which is not what +# you get with rclk. +jtag_khz [ expr 4000 / 6 ] + $_TARGETNAME configure -event reset-init { |