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-rw-r--r--tcl/board/at91eb40a.cfg2
-rw-r--r--tcl/board/at91rm9200-dk.cfg4
-rw-r--r--tcl/board/at91sam9g20-ek.cfg4
-rw-r--r--tcl/board/csb337.cfg4
-rw-r--r--tcl/board/dm365evm.cfg2
-rw-r--r--tcl/board/ek-lm3s1968.cfg4
-rw-r--r--tcl/board/ek-lm3s811.cfg2
-rw-r--r--tcl/board/ek-lm3s9b9x.cfg2
-rw-r--r--tcl/board/ethernut3.cfg2
-rw-r--r--tcl/board/hitex_lpc2929.cfg6
-rw-r--r--tcl/board/hitex_str9-comstick.cfg2
-rw-r--r--tcl/board/imx27lnst.cfg2
-rw-r--r--tcl/board/mini2440.cfg2
-rw-r--r--tcl/board/phytec_lpc3250.cfg6
-rw-r--r--tcl/board/telo.cfg4
-rw-r--r--tcl/board/topas910.cfg2
-rw-r--r--tcl/board/topasa900.cfg2
-rw-r--r--tcl/board/zy1000.cfg2
18 files changed, 27 insertions, 27 deletions
diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg
index 40f2e123..14f21a1a 100644
--- a/tcl/board/at91eb40a.cfg
+++ b/tcl/board/at91eb40a.cfg
@@ -65,4 +65,4 @@ $_TARGETNAME configure -event reset-init {
}
# This target is pretty snappy...
-jtag_khz 16000
+adapter_khz 16000
diff --git a/tcl/board/at91rm9200-dk.cfg b/tcl/board/at91rm9200-dk.cfg
index 9a6f89e6..476f5a80 100644
--- a/tcl/board/at91rm9200-dk.cfg
+++ b/tcl/board/at91rm9200-dk.cfg
@@ -15,7 +15,7 @@ flash_bank cfi 0x10000000 0x00200000 2 2 0
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
- jtag_khz 8
+ adapter_khz 8
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
@@ -41,7 +41,7 @@ proc at91rm9200_dk_init { } {
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
- jtag_khz 40000
+ adapter_khz 40000
#========================================
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index fb6068cc..f24f1a13 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -77,7 +77,7 @@ proc at91sam9g20_init { } {
# means the master clock (MCLK) must be at or below 133 MHz or timing errors will occur. The processor
# core can operate up to 400 MHz and therefore PCLK must be at or below this to function properly.
- jtag_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
+ adapter_khz 2 # Slow-speed oscillator enabled at reset, so run jtag speed slow.
halt # Make sure processor is halted, or error will result in following steps.
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset.
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog.
@@ -112,7 +112,7 @@ proc at91sam9g20_init { } {
# Switch over to adaptive clocking.
- jtag_khz 0
+ adapter_khz 0
# Enable faster DCC downloads.
diff --git a/tcl/board/csb337.cfg b/tcl/board/csb337.cfg
index b7bce489..5e225f5f 100644
--- a/tcl/board/csb337.cfg
+++ b/tcl/board/csb337.cfg
@@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {
proc csb337_clk_init { } {
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
- jtag_khz 8
+ adapter_khz 8
# CKGR_MOR: start main oscillator (3.6864 MHz)
mww 0xfffffc20 0xff01
@@ -37,7 +37,7 @@ proc csb337_clk_init { } {
sleep 20
# CPU is in Normal Mode ... allows faster JTAG clock speed
- jtag_khz 40000
+ adapter_khz 40000
}
proc csb337_nor_init { } {
diff --git a/tcl/board/dm365evm.cfg b/tcl/board/dm365evm.cfg
index f8ec4e04..8f268c45 100644
--- a/tcl/board/dm365evm.cfg
+++ b/tcl/board/dm365evm.cfg
@@ -103,7 +103,7 @@ proc dm365evm_init {} {
echo "Initialize DM365 EVM board"
# CLKIN = 24 MHz ... can't talk quickly to ARM yet
- jtag_khz 1500
+ adapter_khz 1500
# FIXME -- PLL init
diff --git a/tcl/board/ek-lm3s1968.cfg b/tcl/board/ek-lm3s1968.cfg
index bf4b0972..6ce7f7fa 100644
--- a/tcl/board/ek-lm3s1968.cfg
+++ b/tcl/board/ek-lm3s1968.cfg
@@ -4,7 +4,7 @@
# http://www.luminarymicro.com/products/lm3s1968_evaluation_kits.html
# NOTE: to use J-Link instead of the on-board interface,
-# you may also need to reduce jtag_khz to be about 1200.
+# you may also need to reduce adapter_khz to be about 1200.
# source [find interface/jlink.cfg]
# include the FT2232 interface config for on-board JTAG interface
@@ -14,7 +14,7 @@ source [find interface/luminary.cfg]
source [find target/lm3s1968.cfg]
# jtag speed
-jtag_khz 3000
+adapter_khz 3000
jtag_nsrst_delay 100
diff --git a/tcl/board/ek-lm3s811.cfg b/tcl/board/ek-lm3s811.cfg
index 5825c23d..078cae1f 100644
--- a/tcl/board/ek-lm3s811.cfg
+++ b/tcl/board/ek-lm3s811.cfg
@@ -10,7 +10,7 @@ source [find interface/luminary.cfg]
source [find target/lm3s811.cfg]
# jtag speed
-jtag_khz 500
+adapter_khz 500
jtag_nsrst_delay 100
diff --git a/tcl/board/ek-lm3s9b9x.cfg b/tcl/board/ek-lm3s9b9x.cfg
index 407ecc80..b8be88b8 100644
--- a/tcl/board/ek-lm3s9b9x.cfg
+++ b/tcl/board/ek-lm3s9b9x.cfg
@@ -9,7 +9,7 @@ source [find interface/luminary-icdi.cfg]
source [find target/lm3s9b9x.cfg]
# jtag speed
-jtag_khz 500
+adapter_khz 500
jtag_nsrst_delay 100
diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg
index f22e6887..359cb0bf 100644
--- a/tcl/board/ethernut3.cfg
+++ b/tcl/board/ethernut3.cfg
@@ -26,7 +26,7 @@ jtag_ntrst_delay 300
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
-jtag_khz 16000
+adapter_khz 16000
# Target events
diff --git a/tcl/board/hitex_lpc2929.cfg b/tcl/board/hitex_lpc2929.cfg
index 7d06f745..35cc7d0b 100644
--- a/tcl/board/hitex_lpc2929.cfg
+++ b/tcl/board/hitex_lpc2929.cfg
@@ -7,7 +7,7 @@ jtag_ntrst_delay 1
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
# Adaptive clocking through RTCK is not supported.
-jtag_khz 2000
+adapter_khz 2000
# Target device: LPC29xx with ETB
# The following variables are used by the LPC2900 script:
@@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
# Event handlers
$_TARGETNAME configure -event reset-start {
# Back to the slow JTAG clock
- jtag_khz 2000
+ adapter_khz 2000
}
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
@@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
mww 0xFFFF8070 0x02000000 # SYS_CLK_CONF: PLL
# Increase JTAG speed
- jtag_khz 6000
+ adapter_khz 6000
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
mww 0xE0001138 0x0000001F # P1.14 = D0
diff --git a/tcl/board/hitex_str9-comstick.cfg b/tcl/board/hitex_str9-comstick.cfg
index af7527a1..ade24f62 100644
--- a/tcl/board/hitex_str9-comstick.cfg
+++ b/tcl/board/hitex_str9-comstick.cfg
@@ -5,7 +5,7 @@
source [find interface/hitex_str9-comstick.cfg]
# set jtag speed
-jtag_khz 3000
+adapter_khz 3000
jtag_nsrst_delay 100
jtag_ntrst_delay 100
diff --git a/tcl/board/imx27lnst.cfg b/tcl/board/imx27lnst.cfg
index ae141d41..e0ed0579 100644
--- a/tcl/board/imx27lnst.cfg
+++ b/tcl/board/imx27lnst.cfg
@@ -8,7 +8,7 @@ proc imx27lnst_init { } {
# This setup puts RAM at 0xA0000000
# reset the board correctly
- jtag_khz 500
+ adapter_khz 500
reset run
reset halt
diff --git a/tcl/board/mini2440.cfg b/tcl/board/mini2440.cfg
index 47bebc43..b053c225 100644
--- a/tcl/board/mini2440.cfg
+++ b/tcl/board/mini2440.cfg
@@ -121,7 +121,7 @@ reset_config trst_and_srst
# IMPORTANT! See README at top of this file.
#-------------------------------------------------------------------------
- jtag_khz 12000
+ adapter_khz 12000
jtag interface
#-------------------------------------------------------------------------
diff --git a/tcl/board/phytec_lpc3250.cfg b/tcl/board/phytec_lpc3250.cfg
index 78cb90de..51622ef1 100644
--- a/tcl/board/phytec_lpc3250.cfg
+++ b/tcl/board/phytec_lpc3250.cfg
@@ -2,7 +2,7 @@ source [find target/lpc3250.cfg]
jtag_nsrst_delay 200
jtag_ntrst_delay 1
-jtag_khz 200
+adapter_khz 200
reset_config trst_and_srst separate
arm7_9 dcc_downloads enable
@@ -11,11 +11,11 @@ $_TARGETNAME configure -event gdb-attach { reset init }
$_TARGETNAME configure -event reset-start {
arm7_9 fast_memory_access disable
- jtag_khz 200
+ adapter_khz 200
}
$_TARGETNAME configure -event reset-end {
- jtag_khz 6000
+ adapter_khz 6000
arm7_9 fast_memory_access enable
}
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 0cbdb816..cb4bc2a3 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -26,11 +26,11 @@ reset_config trst_and_srst separate
# issue telnet: reset init
# issue gdb: monitor reset init
$_TARGETNAME configure -event reset-init {
- jtag_khz 100
+ adapter_khz 100
# this will setup Telo board
setupTelo
#turn up the JTAG speed
- jtag_khz 3000
+ adapter_khz 3000
puts "JTAG speek now 3MHz"
puts "type helpC100 to get help on C100"
}
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index ae72c4b7..303fc778 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -99,7 +99,7 @@ proc topas910_init { } {
mww 0xf4300004 0x00000000
sleep 10
-# jtag_khz NNNN
+# adapter_khz NNNN
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index 5984f81f..aa3f77f2 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -105,7 +105,7 @@ proc topasa900_init { } {
mww 0xf4300004 0x00000000
sleep 10
-# jtag_khz NNNN
+# adapter_khz NNNN
# remap off in case of IROM boot
mww 0xf0000004 0x00000001
diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg
index 8278fa46..17594c2f 100644
--- a/tcl/board/zy1000.cfg
+++ b/tcl/board/zy1000.cfg
@@ -66,7 +66,7 @@ $_TARGETNAME configure -event reset-init {
# other things than flash programming.
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
-jtag_khz 16000
+adapter_khz 16000
proc production_info {} {
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-23 08:37:29 +0000