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* Add preliminary support for Freescale iMX53Luca Ellero2011-04-131-0/+51
| | | | Signed-off-by: Luca Ellero <lroluk@gmail.com>
* Add the REV A tap id to the LPC3250 configurationAlexandre Pereira da Silva2011-04-131-1/+8
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* pandaboard: use new -dbgbase option to workaround broken ROM tableØyvind Harboe2011-04-021-1/+14
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* omap4430: cortex a9 and a8 are now merged againØyvind Harboe2011-03-221-1/+1
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* omap4430: force hardware breakpoints for GDBAaron Carroll2011-03-131-0/+3
| | | | | | | Soft breakpoints are currently broken if the MMU is enabled due to incorrect cache flushing. Until this is fixed, force the use of hardware breakpoints. Signed-off-by: Aaron Carroll <aaronc@ok-labs.com>
* at91: add at91sam9g45 supportJean-Christophe PLAGNIOL-VILLARD2011-03-031-0/+16
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: add at91sam9g10 supportJean-Christophe PLAGNIOL-VILLARD2011-03-031-0/+16
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91sam9260: update sram informationJean-Christophe PLAGNIOL-VILLARD2011-03-031-1/+6
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: add at91sam9263 supportJean-Christophe PLAGNIOL-VILLARD2011-03-031-0/+20
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91: add at91sam9261 supportJean-Christophe PLAGNIOL-VILLARD2011-03-031-0/+14
| | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* at91sam9: factorise cpu supportJean-Christophe PLAGNIOL-VILLARD2011-03-035-100/+69
| | | | | | | | all at91sam9 are nearly the same except sram and soc name Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
* stm32: add ID for medium density device Rev ZLuca Ellero2011-02-181-4/+5
| | | | | | | stm32-discovery evaluation board (STM32F100RBTB6): reading device id register (0xE0042000) returns 0x10010420 Signed-off-by: Luca Ellero <lroluk@gmail.com>
* omap4430: Add JRC TAPID for PandaBoard REV EA1 (PEAP platforms)Luca Ellero2011-02-081-2/+12
| | | | | | | PandaBoard REV EA1 (Panda Early Adopter Program) has a different ID. This patch add alternate REV EA1 TAP id to configuration file Signed-off-by: Luca Ellero <lroluk@gmail.com>
* omap4430: fix reset sequenceAaron Carroll2011-02-021-8/+3
| | | | | | | | | * Write to the PRM reset control register should have been 'phys'; * Setup empty reset-assert handlers for the M3's, since the board-level reset takes care of them; * Remove the dbginit cruft, because it gets called implicitly on reset. Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* TCL configs for OMAP4430 and PandaboardAaron Carroll2011-01-311-0/+106
| | | | Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
* Add another level of procedures to LPC2xxx initialization - procedures for ↵Freddie Chopin2011-01-097-21/+105
| | | | | | specific targets (setup_lpc<number>) take core clock and adapter clock as parameters. This way "constant" parameters (flash size and type, CPUTAPID, etc.) do not need to be copied if one wishes to change the "variable" parameters - like the core clock or adapter clock - in a board config file or somewhere else. Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* Add common LPC2xxx setup procedure, use in all LPC2xxx files.Freddie Chopin2011-01-078-238/+85
| | | | Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* stm32: add stm32 xl family flash supportSpencer Oliver2010-12-232-2/+12
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* lpc2148: redo to the new target configuration schemeØyvind Harboe2010-12-221-46/+41
| | | | | | | | | | | | Define a proc which PCBs can easily override. Also demonstrates how to add multiple TAP exepcted-id's using arguments. Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon I happened to have on my desk? Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* update IXP42x target / XBA board configMichael Schwingen2010-12-192-96/+83
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* Add support for Hilscher netX controllersMichael Trensch2010-12-183-9/+105
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* TCL: fix non TCL commentsAntonio Borneo2010-12-184-75/+75
| | | | | | | | End of line comments fixed with ';' before '#'. Added few additional 'space' to keep indentation in multi-line comments. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* remove srst_pulls_trst from LPC2xxx target scriptsFreddie Chopin2010-12-096-12/+6
| | | | | | LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code. Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* lpc2478 target config: CCLK as (mandatory) parameterRolf Meeser2010-12-051-4/+7
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* stm32: set default soft reset configSpencer Oliver2010-12-031-0/+4
| | | | | | | If no srst is configured then default to using sysresetreq to reset the target. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* config: fix luminary jtag configSpencer Oliver2010-12-021-3/+0
| | | | | | | When this config was updated in commit e3773e3e3d1f1ee0dbb0b69e8babe8419784d1c1 the old jtag declaration was not removed. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* rename some target scripts to be consistent with the restFreddie Chopin2010-12-023-0/+0
| | | | | | Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...) Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* FLASH/NOR: rename from spearsmi to stmsmiAntonio Borneo2010-11-231-1/+1
| | | | | | | STMicroelectronics controller SMI is not SPEAr specific. Rename it and change name to every symbol in the code. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* STR750: Add SMI interface supportAntonio Borneo2010-11-231-0/+12
| | | | | | | Modified spearsmi driver to include support for STR75x Added missing initialization in tcl file for STR750 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* TCL scripts: replace "puts" with "echo"Antonio Borneo2010-11-097-131/+131
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* lpc3131: target definitionAndrew Leech2010-11-091-0/+76
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* TCL scripts: add support for ST SPEAr310Antonio Borneo2010-11-061-0/+41
| | | | | | | | | | Initial support for ST SPEAr310 and for the evaluation board EVALSPEAr310 Rev. 2.0. Scripts are split in generic for SPEAr3xx family and specific for SPEAr310. This should easily allow adding new members of the family. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* CortexA8: Introduce Freescale i.MX51 variantMarek Vasut2010-11-051-0/+51
| | | | | | | | | | | This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* Make systesetreq typos read sysresetreq insteadPeter Stuge2010-10-251-1/+1
| | | | Signed-off-by: Peter Stuge <peter@stuge.se>
* Remove srst_pulls_trst from LPC1768 targetPeter Stuge2010-10-251-3/+0
| | | | | | | srst_pulls_trst may be true on some (broken) LPC1768 boards but is not true in general for the LPC1768. Signed-off-by: Peter Stuge <peter@stuge.se>
* swj-dp.tcl (SWD infrastructure #1)David Brownell2010-10-103-1/+44
| | | | | | | | | | | | | | | | | | | | Provide new helper proc that can set up either an SWD or JTAG DAP based on the transport which is in use -- mostly for SWJ-DP. Also update some SWJ-DP based chips/targets to use it. The goal is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips really need this flexible configuration to cope with debug adapters that support different transports, without needing new target configs for each transport or adapter. For JTAG-DP, callers will use "jtag newtap" directly, as today; only one chip-level transport option exists. For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly (part of an upcoming SWD transport patch). Again, only one transport option exists, so hard-wiring is appropriate there. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Fix omap3_dbginit to write to physical memory.Zachary T Welch2010-09-261-1/+1
| | | | | Setting the OMAP3530 DBGEN bit must be done in physical memory, so update omap3_dbginit callback to use the new 'mww phys' command syntax.
* TCL scripts: collect duplicated proceduresAntonio Borneo2010-09-213-35/+3
| | | | | | | | TCL procedures mrw and mmw, originally in DaVinci target code, are duplicated in other TCL scripts. Moved in a common helper file, and added help/usage description. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM.Karl Kurbjun2010-09-201-0/+203
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* board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013Takács Áron2010-09-141-1/+7
| | | | | | | | | | the new Marvell PXA270M processor has a new TAPID: 0x89265013. Attached you will find a patch for target/pxa270.cfg that will handle this. I have also attached a board/colibri.cfg file to support the Colibri PXA270 module by Toradex. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex m3: add cortex_m3 reset_config cmdSpencer Oliver2010-08-311-6/+37
| | | | | | | | | | | | This new cmd adds the ability to choose the Cortex-M3 reset method used. It defaults to using SRST for reset if available otherwise it falls back to using NVIC VECTRESET. This is known to work on all cores. Move any luminary specific reset handling to the stellaris cfg file. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfg: update Luminary config filesSpencer Oliver2010-08-314-101/+7
| | | | | | | | - Update all Luminary config's to use a common target/stellaris.cfg. - Add Luminary ek-lm3s6965 config. - Increase working area for boards with more ram. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* imx35pdk: fix clock and reset delaysØyvind Harboe2010-08-191-0/+1
| | | | | | Use rclk and 100ms delay on ntrst Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* mcb1700: Keil MCB1700 w/1768 config scriptØyvind Harboe2010-08-171-12/+4
| | | | | | Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* avr32: basic target scriptOleksandr Tymoshenko2010-08-151-0/+18
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* at32ap7000 config fileDavid Brownell2010-08-151-0/+16
| | | | nice board to play with.
* lpc1768: turn down the jtag clockØyvind Harboe2010-08-131-7/+9
| | | | | | | Tests should that it needs to be as low as 100kHz to be stable. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* DM36x: Set OSCDIV dividerThomas Koeller2010-08-121-0/+7
| | | | | | The ability to set up the OSCDIV divider was missing. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Disable unused SYSCLKsThomas Koeller2010-08-121-1/+20
| | | | | | | | Clear the enable bits for all clocks that are not set explicitly. This is done to increase robustness by removing pre-existing state. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Use enable bit for PLL pre-dividerThomas Koeller2010-08-121-1/+1
| | | | | | | The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
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