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* TCL: fix non TCL commentsAntonio Borneo2010-12-1828-732/+732
| | | | | | | | End of line comments fixed with ';' before '#'. Added few additional 'space' to keep indentation in multi-line comments. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* stm32: add STM32E-EVAL external memory config scriptSpencer Oliver2010-12-101-0/+56
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* remove srst_pulls_trst from LPC2xxx target scriptsFreddie Chopin2010-12-096-12/+6
| | | | | | LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code. Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* lpc2478 target config: CCLK as (mandatory) parameterRolf Meeser2010-12-051-4/+7
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* Add board config for Embedded Artists LPC2478-32Rolf Meeser2010-12-041-0/+148
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* Fix flash name in Hitex LPC2929 board configRolf Meeser2010-12-041-1/+1
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* stm32: set default soft reset configSpencer Oliver2010-12-031-0/+4
| | | | | | | If no srst is configured then default to using sysresetreq to reset the target. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* luminary: remove unused config cmds.Spencer Oliver2010-12-035-31/+0
| | | | | | | | | | | Due to commit e40aee2954d2beabe1d8c530d9ff1e564fb01f48 we now honour the targets 'reset_config' setting. Previously we ignored the srst setting for luminary targets. Luminary targets have never supported using srst to reset into debug mode so remove the option from the target configs files. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* config: fix luminary jtag configSpencer Oliver2010-12-021-3/+0
| | | | | | | When this config was updated in commit e3773e3e3d1f1ee0dbb0b69e8babe8419784d1c1 the old jtag declaration was not removed. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* rename some target scripts to be consistent with the restFreddie Chopin2010-12-023-0/+0
| | | | | | Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...) Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* Added support for the blinking leds on Floss-JTAG v0.3 and newer.Piotr Esden-Tempski2010-11-301-1/+1
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* Updated Floss-JTAG config file to support v0.3 and newer. Also added ↵Piotr Esden-Tempski2010-11-302-1/+29
| | | | noeeprom version of the config file for older versions of Floss-JTAG.
* FLASH/NOR: rename from spearsmi to stmsmiAntonio Borneo2010-11-232-2/+2
| | | | | | | STMicroelectronics controller SMI is not SPEAr specific. Rename it and change name to every symbol in the code. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* STR750: Add SMI interface supportAntonio Borneo2010-11-231-0/+12
| | | | | | | Modified spearsmi driver to include support for STR75x Added missing initialization in tcl file for STR750 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* TCL/SPEAr: Added Serial flash in board fileAntonio Borneo2010-11-161-0/+4
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* TCL scripts: replace "puts" with "echo"Antonio Borneo2010-11-0923-197/+197
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* lpc3131: target definitionAndrew Leech2010-11-091-0/+76
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* TCL scripts: add support for ST SPEAr310Antonio Borneo2010-11-067-0/+428
| | | | | | | | | | Initial support for ST SPEAr310 and for the evaluation board EVALSPEAr310 Rev. 2.0. Scripts are split in generic for SPEAr3xx family and specific for SPEAr310. This should easily allow adding new members of the family. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* Add EfikaMX smarttop board supportMarek Vasut2010-11-051-0/+9
| | | | | | | This patch finally adds support for i.MX51 based Genesi USA EfikaMX smarttop board. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* CortexA8: Introduce Freescale i.MX51 variantMarek Vasut2010-11-051-0/+51
| | | | | | | | | | | This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* imx31pdk: use rclk w/1MHz fallbackØyvind Harboe2010-10-281-0/+17
| | | | | | | | measure_clk indicates ca. 3-4MHz, so 1MHz should be safe. Added self_test proc used to test that rclk worked. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Make systesetreq typos read sysresetreq insteadPeter Stuge2010-10-251-1/+1
| | | | Signed-off-by: Peter Stuge <peter@stuge.se>
* Remove srst_pulls_trst from LPC1768 targetPeter Stuge2010-10-251-3/+0
| | | | | | | srst_pulls_trst may be true on some (broken) LPC1768 boards but is not true in general for the LPC1768. Signed-off-by: Peter Stuge <peter@stuge.se>
* swj-dp.tcl (SWD infrastructure #1)David Brownell2010-10-103-1/+44
| | | | | | | | | | | | | | | | | | | | Provide new helper proc that can set up either an SWD or JTAG DAP based on the transport which is in use -- mostly for SWJ-DP. Also update some SWJ-DP based chips/targets to use it. The goal is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips really need this flexible configuration to cope with debug adapters that support different transports, without needing new target configs for each transport or adapter. For JTAG-DP, callers will use "jtag newtap" directly, as today; only one chip-level transport option exists. For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly (part of an upcoming SWD transport patch). Again, only one transport option exists, so hard-wiring is appropriate there. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* TCL scripts: fix ocd_mem2array/mem2arrayAntonio Borneo2010-09-281-1/+1
| | | | | | | | In previous patch, I have introduced again the symbol "ocd_mem2array", now replaced by "mem2array". Fix the error. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* Fix omap3_dbginit to write to physical memory.Zachary T Welch2010-09-261-1/+1
| | | | | Setting the OMAP3530 DBGEN bit must be done in physical memory, so update omap3_dbginit callback to use the new 'mww phys' command syntax.
* TCL scripts: collect duplicated proceduresAntonio Borneo2010-09-214-35/+25
| | | | | | | | TCL procedures mrw and mmw, originally in DaVinci target code, are duplicated in other TCL scripts. Moved in a common helper file, and added help/usage description. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* tcl: remove incomplete unused tcl fileØyvind Harboe2010-09-201-24/+0
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM.Karl Kurbjun2010-09-203-82/+221
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* board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013Takács Áron2010-09-142-1/+20
| | | | | | | | | | the new Marvell PXA270M processor has a new TAPID: 0x89265013. Attached you will find a patch for target/pxa270.cfg that will handle this. I have also attached a board/colibri.cfg file to support the Colibri PXA270 module by Toradex. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex m3: add cortex_m3 reset_config cmdSpencer Oliver2010-08-311-6/+37
| | | | | | | | | | | | This new cmd adds the ability to choose the Cortex-M3 reset method used. It defaults to using SRST for reset if available otherwise it falls back to using NVIC VECTRESET. This is known to work on all cores. Move any luminary specific reset handling to the stellaris cfg file. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfg: update Luminary config filesSpencer Oliver2010-08-319-105/+36
| | | | | | | | - Update all Luminary config's to use a common target/stellaris.cfg. - Add Luminary ek-lm3s6965 config. - Increase working area for boards with more ram. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* imx35pdk: fix clock and reset delaysØyvind Harboe2010-08-192-0/+5
| | | | | | Use rclk and 100ms delay on ntrst Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* mcb1700: Keil MCB1700 w/1768 config scriptØyvind Harboe2010-08-172-12/+79
| | | | | | Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* update more Stellaris EK board commentsDavid Brownell2010-08-162-0/+4
| | | | | | | Using the bundled JTAG/SWD debug support in JTAG mode is optional on *all* of the EK boards. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Update comments for some Stellaris EK boards.David Brownell2010-08-162-1/+3
| | | | | | | These don't need to use the on-board debuggers in JTAG mode. Off-board is OK, as would be SWD mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* avr32: basic target scriptOleksandr Tymoshenko2010-08-151-0/+18
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* at32ap7000 config fileDavid Brownell2010-08-151-0/+16
| | | | nice board to play with.
* lpc1768: turn down the jtag clockØyvind Harboe2010-08-131-7/+9
| | | | | | | Tests should that it needs to be as low as 100kHz to be stable. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Added Lisa/L script as a target board.Piotr Esden-Tempski2010-08-131-0/+7
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* Added support for Lisa/L builtin JTAG interface.Piotr Esden-Tempski2010-08-131-0/+11
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* at91cap7a-stk-sdram.cfg: faster resetØyvind Harboe2010-08-121-5/+5
| | | | | | crank up JTAG speed as soon as clocks are set up. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* DM36x: Set OSCDIV dividerThomas Koeller2010-08-121-0/+7
| | | | | | The ability to set up the OSCDIV divider was missing. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Disable unused SYSCLKsThomas Koeller2010-08-121-1/+20
| | | | | | | | Clear the enable bits for all clocks that are not set explicitly. This is done to increase robustness by removing pre-existing state. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Use enable bit for PLL pre-dividerThomas Koeller2010-08-121-1/+1
| | | | | | | The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* tcl: remove silly ocd_ prefix to array2mem and mem2arrayØyvind Harboe2010-08-116-15/+15
| | | | | | | | ocd_ prefix is used internally in OpenOCD as a kludge more or less to deal with the two kinds of commands that OpenOCD has. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* board: added at91cap7a stk w/sdram config scriptsØyvind Harboe2010-08-111-0/+165
| | | | | | | The strange thing here with this board is that 16MHz kinda works, but only 2MHz is really stable. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* config scripts: remove useless reference to OpenOCD docsØyvind Harboe2010-08-1110-30/+0
| | | | | | clutters config scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: add omapl138 support and da850evm preliminary supportBen Gardiner2010-08-102-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the omapl138 target and preliminary support for the da850evm. The target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file. I have performed limited testing with this setup. I am posting this patch in the interest of sharing cfg files and in the hopes that the experts on this list can correct errors I have made or point out enhancements. The testing I have performed is debugging uboot with gdb where I also use the following local.cfg and gdbinit files. Debugging appears to work in so much as 'ni' works. local.cfg: gdb_memory_map disable gdbinit: target remote localhost:3333 set remote hardware-breakpoint-limit 2 set remote hardware-watchpoint-limit 2 monitor poll on Comments welcome. Best Regards, Ben Gardiner
* Luminary-icdi comment updateDavid Brownell2010-08-031-0/+4
| | | | | | | Clarify that ICDI is the generic logic, but this config is for the JTAG-only (no-SWD) mode. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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