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author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-05-14 14:13:38 +0000 |
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committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-05-14 14:13:38 +0000 |
commit | 548bb19aa28ca2eec4b8f1c06cbb4b0ace162db3 (patch) | |
tree | 3652a17e6c525942d3a2becfa05dbda1d9972437 /doc/openocd.texi | |
parent | f1e72cf029f28a337679ca787003c54d5c1e2bde (diff) | |
download | openocd_libswd-548bb19aa28ca2eec4b8f1c06cbb4b0ace162db3.tar.gz openocd_libswd-548bb19aa28ca2eec4b8f1c06cbb4b0ace162db3.tar.bz2 openocd_libswd-548bb19aa28ca2eec4b8f1c06cbb4b0ace162db3.tar.xz openocd_libswd-548bb19aa28ca2eec4b8f1c06cbb4b0ace162db3.zip |
- added jlink support, based on Jürgen Stuber patch
git-svn-id: svn://svn.berlios.de/openocd/trunk@658 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'doc/openocd.texi')
-rw-r--r-- | doc/openocd.texi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/doc/openocd.texi b/doc/openocd.texi index 7f13f042..c9bbed7c 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -176,6 +176,8 @@ build properly.} @option{--enable-presto_libftdi} @item @option{--enable-presto_ftd2xx} +@item +@option{--enable-jlink} @end itemize If you want to access the parallel port using the PPDEV interface you have to specify @@ -259,7 +261,7 @@ Set to <@var{enable}> to cause OpenOCD to send the memory configuration to gdb w requested. gdb will then know when to set hardware breakpoints, and program flash using the gdb load command. @option{gdb_flash_program enable} will also need enabling for flash programming to work. -Default behaviour is <@var{disable}> +Default behaviour is <@var{enable}> @item @b{gdb_flash_program} <@var{enable|disable}> @cindex gdb_flash_program Set to <@var{enable}> to cause OpenOCD to program the flash memory when a @@ -312,6 +314,10 @@ usbprog is a freely programmable USB adapter. @item @b{gw16012} Gateworks GW16012 JTAG programmer. @end itemize +@itemize @minus +@item @b{jlink} +Segger jlink usb adapter +@end itemize @end itemize @itemize @bullet @@ -326,6 +332,7 @@ is optional, in which case the reset speed is used. @item wiggler: maximum speed / @var{number} @item ft2232: 6MHz / (@var{number}+1) @item amt jtagaccel: 8 / 2**@var{number} +@item jlink: maximum speed in kHz (0-12000), 0 will use RTCK @end itemize Note: Make sure the jtag clock is no more than @math{1/6th × CPU-Clock}. This is |