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authordrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2006-09-28 10:41:43 +0000
committerdrath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2006-09-28 10:41:43 +0000
commita582e9a8d183c56d1aa8ae18afc1c11e2cbd6d2d (patch)
treebc069458c57c3bb587df10d5bd257d5f49657e68 /src/target/arm966e.c
parentb855855445489c43de2b796f1ac921e518d787bd (diff)
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- str9x flash support (Thanks to Spencer Oliver)
- str75x flash support (Thanks to Spencer Oliver) - correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this) - core-state (ARM/Thumb) can be switched by modifying CPSR - fixed bug in gdb_server register handling - register values > 32-bit should now be supported - several minor fixes and enhancements git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/arm966e.c')
-rw-r--r--src/target/arm966e.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index b7cfea80..f5f4a209 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -70,6 +70,8 @@ target_type_t arm966e_target =
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
+ .run_algorithm = armv4_5_run_algorithm,
+
.add_breakpoint = arm7_9_add_breakpoint,
.remove_breakpoint = arm7_9_remove_breakpoint,
.add_watchpoint = arm7_9_add_watchpoint,