Add a new JTAG "setup" event; use for better DaVinci ICEpick support.

The model is that this fires after scanchain verification, when it's
safe to call "jtag tapenable $TAPNAME".  So it will fire as part of
non-error paths of "init" and "reset" command processing.  However it
will *NOT* trigger during "jtag_reset" processing, which skips all
scan chain verification, or after verification errors.

ALSO:
 - switch DaVinci chips to use this new mechanism
 - log TAP activation/deactivation, since their IDCODEs aren't verified
 - unify "enum jtag_event" scripted event notifications
 - remove duplicative JTAG_TAP_EVENT_POST_RESET


git-svn-id: svn://svn.berlios.de/openocd/trunk@2800 b42882b7-edfa-0310-969c-e2dbd0fdcd60

1 files changed, 5 insertions, 2 deletions

diff --git a/tcl/target/ti_dm355.cfg b/tcl/target/ti_dm355.cfg
index b1e19e99..2551c3ed 100644
--- a/tcl/target/ti_dm355.cfg
+++ b/tcl/target/ti_dm355.cfg
@@ -9,11 +9,11 @@ if { [info exists CHIPNAME] } {
 
 # TI boards default to EMU0/EMU1 *high* -- ARM and ETB are *disabled*
 # after JTAG reset until ICEpick is used to route them in.
-#set EMU01 "-disable"
+set EMU01 "-disable"
 
 # With EMU0/EMU1 jumpered *low* ARM and ETB are *enabled* without
 # needing any ICEpick interaction.
-set EMU01 "-enable"
+#set EMU01 "-enable"
 
 source [find target/icepick.cfg]
 
@@ -50,6 +50,9 @@ if { [info exists JRC_TAPID ] } {
 }
 jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID
 
+jtag configure $_CHIPNAME.jrc -event setup \
+	"jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
+
 ################
 
 # various symbol definitions, to avoid hard-wiring addresses