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| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-08-17 21:51:36 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-08-17 21:52:39 +0200 |
| commit | 2c4ef30b11f459028c20185f41320e856db8c3a1 (patch) | |
| tree | ec843485de6a2b7d94faceb3c31e36c6c67bc2b0 /tcl/target | |
| parent | 962946ea89fd948ab8c147134f06caa89b31e244 (diff) | |
| download | openocd_libswd-2c4ef30b11f459028c20185f41320e856db8c3a1.tar.gz openocd_libswd-2c4ef30b11f459028c20185f41320e856db8c3a1.tar.bz2 openocd_libswd-2c4ef30b11f459028c20185f41320e856db8c3a1.tar.xz openocd_libswd-2c4ef30b11f459028c20185f41320e856db8c3a1.zip | |
mcb1700: Keil MCB1700 w/1768 config script
Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'tcl/target')
| -rw-r--r-- | tcl/target/lpc1768.cfg | 16 |
1 files changed, 4 insertions, 12 deletions
diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index 07c5ab83..4a1ff0bc 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -47,18 +47,10 @@ set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ lpc1700 $_CCLK calc_checksum -# Although rclk "appears to work", it turns out that this yields -# 4MHz whereas the "correct" rate is CCLK/6, which is not what -# you get with rclk. -# -# Also, crank down the frequency further as we're running of an -# RC oscillator instead of crystal. -# -# Setting up XTAL in the reset-init sequence could be worth -# the effort if you need to program the flash which is pretty -# big on these devices. -# -jtag_khz 100 +# Run with *real slow* clock by default since the +# boot rom could have been playing with the PLL, so +# we have no idea what clock the target is running at. +jtag_khz 10 $_TARGETNAME configure -event reset-init { # Do not remap 0x0000-0x0020 to anything but the flash (i.e. select |