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author | Trygve Laugstøl <trygvis@inamo.no> | 2017-01-25 22:24:18 +0100 |
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committer | Trygve Laugstøl <trygvis@inamo.no> | 2017-01-25 22:29:25 +0100 |
commit | 40e04e3772726829d66c12e69f24b03920d79c67 (patch) | |
tree | 636811bad956798c9d5d22de9e7ba8c799b8d791 /thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade | |
parent | 2fff65aed2477a503c72629d27e2a330d30c02d1 (diff) | |
download | stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.gz stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.bz2 stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.xz stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.zip |
o Moving tinyprintf and stm libraries under thirdparty.
Diffstat (limited to 'thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade')
159 files changed, 68635 insertions, 0 deletions
diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewd b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewd new file mode 100644 index 0000000..26ba5a9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewd @@ -0,0 +1,8092 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>23</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F103xE.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>1</state> + </option> + <option> + <name>OCProductVersion</name> + <state>4.41A</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>6.40.1.53794</state> + </option> + <option> + <name>OCDownloadAttachToProgram</name> + <state>0</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxE.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>ANGEL_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCAngelHeartbeat</name> + <state>1</state> + </option> + <option> + <name>CAngelCommunication</name> + <state>1</state> + </option> + <option> + <name>CAngelCommBaud</name> + <version>0</version> + <state>3</state> + </option> + <option> + <name>CAngelCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>ANGELTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoAngelLogfile</name> + <state>0</state> + </option> + <option> + <name>AngelLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + </data> + </settings> + <settings> + <name>IARROM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRomLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRomLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CRomCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CRomCommBaud</name> + <version>0</version> + <state>7</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>IJET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>IjetAttachSlave</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeConfigFile</name> + <state>1</state> + </option> + <option> + <name>IjetResetList</name> + <version>0</version> + <state>9</state> + </option> + <option> + <name>IjetHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>IjetHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>IjetPowerFromProbe</name> + <state>1</state> + </option> + <option> + <name>IjetPowerRadio</name> + <state>1</state> + </option> + <option> + <name>IjetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>IjetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>IjetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>IjetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTarget</name> + <state>0</state> + </option> + <option> + <name>IjetScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>IjetIRLength</name> + <state>0</state> + </option> + <option> + <name>IjetJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>IjetProtocolRadio</name> + <state>0</state> + </option> + <option> + <name>IjetSwoPin</name> + <state>0</state> + </option> + <option> + <name>IjetCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>IjetSwoPrescalerList</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>IjetBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>IjetRestoreBreakpointsCheck</name> + <state>0</state> + </option> + <option> + <name>IjetUpdateBreakpointsEdit</name> + <state>_call_main</state> + </option> + <option> + <name>RDICatchReset</name> + <state>0</state> + </option> + <option> + <name>RDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>RDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>RDICatchData</name> + <state>0</state> + </option> + <option> + <name>RDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>RDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>RDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CatchCHKERR</name> + <state>0</state> + </option> + <option> + <name>CatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CatchDummy</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>14</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>32</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>32</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>1</version> + <state>1</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCJLinkBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJLinkUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCJLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>OCJLinkAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCJLinkResetList</name> + <version>6</version> + <state>7</state> + </option> + <option> + <name>CCJLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCCatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CCCatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchCHRERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CCCatchDummy</name> + <state>0</state> + </option> + <option> + <name>OCJLinkScriptFile</name> + <state>1</state> + </option> + <option> + <name>CCJLinkUsbSerialNo</name> + <state></state> + </option> + <option> + <name>CCTcpIpAlt</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJLinkTcpIpSerialNo</name> + <state></state> + </option> + <option> + <name>CCCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>CCSwoClockAuto</name> + <state>0</state> + </option> + <option> + <name>CCSwoClockEdit</name> + <state>2000</state> + </option> + <option> + <name>OCJLinkTraceSource</name> + <state>0</state> + </option> + <option> + <name>OCJLinkTraceSourceDummy</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>LMIFTDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>LmiftdiSpeed</name> + <state>500</state> + </option> + <option> + <name>CCLmiftdiDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCLmiftdiLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCLmiFtdiInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCLmiFtdiInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>MACRAIGOR_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>3</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>jtag</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>EmuSpeed</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>DoEmuMultiTarget</name> + <state>0</state> + </option> + <option> + <name>EmuMultiTarget</name> + <state>0@ARM7TDMI</state> + </option> + <option> + <name>EmuHWReset</name> + <state>0</state> + </option> + <option> + <name>CEmuCommBaud</name> + <version>0</version> + <state>4</state> + </option> + <option> + <name>CEmuCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>jtago</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>UnusedAddr</name> + <state>0x00800000</state> + </option> + <option> + <name>CCMacraigorHWResetDelay</name> + <state></state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCMacraigorInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCMacraigorInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>PEMICRO_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCPEMicroAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCPEMicroInterfaceList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCPEMicroResetDelay</name> + <state></state> + </option> + <option> + <name>CCPEMicroJtagSpeed</name> + <state>#UNINITIALIZED#</state> + </option> + <option> + <name>CCJPEMicroShowSettings</name> + <state>0</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCPEMicroUSBDevice</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCPEMicroSerialPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CCJPEMicroTCPIPAutoScanNetwork</name> + <state>1</state> + </option> + <option> + <name>CCPEMicroTCPIP</name> + <state>10.0.0.1</state> + </option> + <option> + <name>CCPEMicroCommCmdLineProducer</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>RDI_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDIDriverDll</name> + <state>Browse to your RDI driver</state> + </option> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>RDIJTAGJET_ID</name> + <archiveVersion>0</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRDILogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRDILogFileEdit</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCRDIHWReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JTAGjetConfigure</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>STLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>2</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceRadio</name> + <state>1</state> + </option> + <option> + <name>CCSTLinkInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>CCSTLinkResetList</name> + <version>1</version> + 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<file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewp b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewp new file mode 100644 index 0000000..dc50a93 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.ewp @@ -0,0 +1,6913 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>General</name> + <archiveVersion>3</archiveVersion> + <data> + <version>21</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>ExePath</name> + <state>STM3210E-EVAL\Exe</state> + </option> + <option> + <name>ObjPath</name> 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<configuration>STM32303C_EVAL</configuration> + </excluded> + </file> + <file> + <name>$PROJ_DIR$\..\src\spi_if.c</name> + <excluded> + <configuration>STM32L152-EVAL</configuration> + <configuration>STM32L152D-EVAL</configuration> + <configuration>STM32373C_EVAL</configuration> + <configuration>STM32303C_EVAL</configuration> + </excluded> + </file> + <file> + <name>$PROJ_DIR$\..\src\stm32_it.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_desc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_istr.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_prop.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\usb_pwr.c</name> + </file> + </group> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.eww b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.eww new file mode 100644 index 0000000..77855f8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/DFU.eww @@ -0,0 +1,34 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<workspace> + <project> + <path>$WS_DIR$\DFU.ewp</path> + </project> + <batchBuild> + <batchDefinition> + <name>USB-Package-DFU</name> + <member> + <project>DFU</project> + <configuration>STM3210B-EVAL</configuration> + </member> + <member> + <project>DFU</project> + <configuration>STM3210C-EVAL</configuration> + </member> + <member> + <project>DFU</project> + <configuration>STM3210E-EVAL</configuration> + </member> + <member> + <project>DFU</project> + <configuration>STM3210E-EVAL_XL</configuration> + </member> + <member> + <project>DFU</project> + <configuration>STM32L152-EVAL</configuration> + </member> + </batchDefinition> + </batchBuild> +</workspace> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f10x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f10x_flash.icf new file mode 100644 index 0000000..6721a0d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f10x_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f30x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f30x_flash.icf new file mode 100644 index 0000000..9d295c8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f30x_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f37x_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f37x_flash.icf new file mode 100644 index 0000000..a743cb4 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32f37x_flash.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x1800; +define symbol __ICFEDIT_size_heap__ = 0x800; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +export symbol __ICFEDIT_region_RAM_start__; +export symbol __ICFEDIT_region_RAM_end__; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32l1xx_flash.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32l1xx_flash.icf new file mode 100644 index 0000000..8b7d80d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/EWARM/stm32l1xx_flash.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000 ; +define symbol __ICFEDIT_region_ROM_end__ = 0x0805FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvopt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvopt new file mode 100644 index 0000000..631bf1a --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvopt @@ -0,0 +1,2520 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>STM3210B-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210B-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103VB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103VB</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM3210E-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZE</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZE</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(125=-1,-1,-1,-1,0)(126=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC5000 -FN1 -FF0STM32F10x_512 -FS08000000 -FL080000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM3210E-EVAL_XL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL_XL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O142 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_1024 -FS08000000 -FL0100000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L151xx_152xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-U -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>0</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152D-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152D-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L162xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-MPU</SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>ULP2CM3</Key> + <Name>-O207 -S8 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L1xx_384 -FS08000000 -FL060000)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UV0579U9E -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32373C_EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>1</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32373C_EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + 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key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM3210B-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM3210B-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210B-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210B-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl new file mode 100644 index 0000000..2d09c3d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl @@ -0,0 +1,148 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 20k; + map ( size = 20k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector( id = 2, optional, fill = "NMI_Handler" ); /* 2 Non Maskable Interrupt */ + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN RX0 + vector ( id = 37, optional, fill = "CAN_RX1_IRQHandler" ); // CAN RX1 + vector ( id = 38, optional, fill = "CAN_SCE_IRQHandler" ); // CAN SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + + } +} +# endif diff --git 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/.project @@ -0,0 +1,237 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210E-EVAL_XL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM3210E_EVAL</name> + <type>2</type> + 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<type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/flash_if.c</locationURI> + </link> + <link> + <name>User/fsmc_nor.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/fsmc_nor.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/nor_if.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/nor_if.c</locationURI> + </link> + <link> + <name>User/spi_if.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/spi_if.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch new file mode 100644 index 0000000..1f9b805 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/STM3210E-EVAL_XL.launch @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute 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value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute 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key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM3210E-EVAL_XL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210E-EVAL_XL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210E-EVAL_XL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl new file mode 100644 index 0000000..e8acf65 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 0x100000; + map ( size = 0x100000, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.project new file mode 100644 index 0000000..81df374 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.project @@ -0,0 +1,207 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32303C_EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + 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<name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_gpio.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_i2c.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_misc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_pwr.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_rcc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_spi.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_syscfg.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_usart.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32373C_EVAL/.cproject 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@@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f37x.lsl +// +// Version : @(#)stm32f37x.lsl 1.1 12/07/27 +// +// Description : LSL file for the STMicroelectronics STM32F37x +// +// Copyright 2012 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32F37x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMSIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 98 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x20000000 +#endif + + +#ifndef __STACK +# define __STACK 4k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 256k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 32k +#endif + +memory STM32F37x_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory STM32F37x_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + priority = 2; + map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Define the vector table for CMSIS +// +#ifdef __CMSIS_VECTORS +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); // NMI Handler + vector ( id = 3, optional, fill = "HardFault_Handler" ); // Hard Fault Handler + vector ( id = 4, optional, fill = "MemManage_Handler" ); // MPU Fault Handler + vector ( id = 5, optional, fill = "BusFault_Handler" ); // Bus Fault Handler + vector ( id = 6, optional, fill = "UsageFault_Handler" ); // Usage Fault Handler + vector ( id = 11, optional, fill = "SVC_Handler" ); // SVCall Handler + vector ( id = 12, optional, fill = "DebugMon_Handler" ); // Debug Monitor Handler + vector ( id = 14, optional, fill = "PendSV_Handler" ); // PendSV Handler + vector ( id = 15, optional, fill = "SysTick_Handler" ); // SysTick Handler + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper amd TimeStanp through EXTI + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC Wakeup through the EXTI line + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash global interrupt + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC global interrupt + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 interrupt + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 interrupt + vector ( id = 24, optional, fill = "EXTI2_TS_IRQHandler" ); // EXTI2_TS_IRQHandler interrupt + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 interrupt + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 interrupt + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1 global interrupt + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA1 Channel 2 global interrupt + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA1 Channel 3 global interrupt + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA1 Channel 4 global interrupt + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA1 Channel 5 global interrupt + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA1 Channel 6 global interrupt + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA1 Channel 7 global interrupt + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1 interrupts + vector ( id = 35, optional, fill = "CAN1_TX_IRQHandler" ); // CAN1 TX interrupts + vector ( id = 36, optional, fill = "CAN1_RX0_IRQHandler" ); // CAN1 RX0 interrupts + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 interrupt + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE interrupt + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 interrupts + vector ( id = 40, optional, fill = "TIM15_IRQHandler" ); // TIM15 global interrupt + vector ( id = 41, optional, fill = "TIM16_IRQHandler" ); // TIM16 global interrupt + vector ( id = 42, optional, fill = "TIM17_IRQHandler" ); // TIM17 global interrupt + vector ( id = 43, optional, fill = "TIM118_DAC2_IRQHandler" ); // TIM18 global Interrupt and DAC2 underrun Interrupt + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 global interrupt + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 global interrupt + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 global interrupt + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 global interrupt + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 global interrupt + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 global interrupt + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 global interrupt + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 global interrupt + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 interrupts + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "CEC_IRQHandler" ); // CEC interrupt + vector ( id = 59, optional, fill = "TIM12_IRQHandler" ); // TIM12 global interrupt + vector ( id = 60, optional, fill = "TIM13_IRQHandler" ); // TIM13 global interrupt + vector ( id = 61, optional, fill = "TIM14_IRQHandler" ); // TIM14 global interrupt + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 global interrupt + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 global interrupt + vector ( id = 70, optional, fill = "TIM6_DAC1_IRQHandler" ); // TIM6 glbl irq, DAC1 CH1 & CH2 underrun err irqs + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 global interrupt + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel 1 global interrupt + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel 2 global interrupt + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel 3 global interrupt + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel 4 global interrupt + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel 5 global interrupt + vector ( id = 77, optional, fill = "SDADC1_IRQHandler" ); // ADC Sigma Delta 1 global Interrupt + vector ( id = 78, optional, fill = "SDADC2_IRQHandler" ); // ADC Sigma Delta 2 global Interrupt + vector ( id = 79, optional, fill = "SDADC3_IRQHandler" ); // ADC Sigma Delta 3 global Interrupt + vector ( id = 80, optional, fill = "COMP_IRQHandler" ); // COMP1 and COMP2 global interrupt + vector ( id = 90, optional, fill = "USB_HP_IRQHandler" ); // USB High Priority global Interrupt + vector ( id = 91, optional, fill = "USB_LP_IRQHandler" ); // USB Low Priority global Interrupt + vector ( id = 92, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup Interrupt + vector ( id = 94, optional, fill = "TIM19_IRQHandler" ); // TIM19 global Interrupt + vector ( id = 97, optional, fill = "FPU_IRQHandler" ); // Floating point Interrupt + } +} +#endif /* __CMSIS_VECTORS */ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/.cproject new file mode 100644 index 0000000..9233138 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/.cproject @@ -0,0 +1,138 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject 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+/////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx.lsl +// +// Version : @(#)stm32l1xx.lsl 1.5 11/06/30 +// +// Description : LSL file for the STMicroelectronics STM32L1xx +// +// Copyright 2010-2011 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __EEPROM_SIZE Specifies the size of the EEPROM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 73 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + + +#ifndef __STACK +# define __STACK 4k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 384k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif +#ifndef __EEPROM_SIZE +# define __EEPROM_SIZE 4k +#endif + +memory STM32L1xx_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_EEPROM +{ + mau = 8; + type = reserved rom; + size = __EEPROM_SIZE; + map ( size = __EEPROM_SIZE, dest_offset=0x08080000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + vector ( id = 61, optional, fill = "SDIO_IRQHandler" ); // SDIO_IRQHandler + vector ( id = 62, optional, fill = "TIM5_IRQHandler" ); //TIM5_IRQHandler + vector ( id = 63, optional, fill = "SPI3_IRQHandler" ); //SPI3_IRQHandler + vector ( id = 64, optional, fill = "UART4_IRQHandler" ); //UART4_IRQHandler + vector ( id = 65, optional, fill = "UART5_IRQHandler" ); //UART5_IRQHandler + vector ( id = 66, optional, fill = "DMA2_Channel1_IRQHandler" ); //DMA2_Channel1_IRQHandler + vector ( id = 67, optional, fill = "DMA2_Channel2_IRQHandler" ); //DMA2_Channel2_IRQHandler + vector ( id = 68, optional, fill = "DMA2_Channel3_IRQHandler" ); //DMA2_Channel3_IRQHandler + vector ( id = 69, optional, fill = "DMA2_Channel4_IRQHandler" ); //DMA2_Channel4_IRQHandler + vector ( id = 70, optional, fill = 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a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..b107cf4 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 14:36:47 GMT+01:00 2012 +BOARD=STM3210B-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld new file mode 100644 index 0000000..e0aa35c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103VB Device with +** 128KByte FLASH, 20KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20005000; /* end of 20K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes 0 : { *(.ARM.attributes) } + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/.cproject new 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 14:37:30 GMT+01:00 2012 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZE +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld new file mode 100644 index 0000000..8320534 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZE Device with +** 512KByte FLASH, 64KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20010000; /* end of 64K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes 0 : { *(.ARM.attributes) } + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/.cproject 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_xl.s</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_xl.s</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/flash_if.c</locationURI> + </link> + <link> + <name>User/fsmc_nor.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/fsmc_nor.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/main.c</locationURI> + </link> + <link> + <name>User/nor_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/nor_if.c</locationURI> + </link> + <link> + <name>User/spi_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/spi_if.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..2835322 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 14:37:55 GMT+01:00 2012 +BOARD=STM3210E-EVAL_XL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/STM32F10X_XL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/STM32F10X_XL.elf.launch new file mode 100644 index 0000000..e5ada8e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/STM32F10X_XL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\TrueSTUDIO\STM3210E-EVAL_XL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> 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+</cproject> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch new file mode 100644 index 0000000..53aeace --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute 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value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld new file mode 100644 index 0000000..c0e7344 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld @@ -0,0 +1,190 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F303VC Device with +** 256KByte FLASH, 40KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000a000; /* end of 40K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K + CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.cproject new file mode 100644 index 0000000..f6f0f6d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.cproject @@ -0,0 +1,352 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.atollic.truestudio.exe.debug.311825581"> + <storageModule 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</link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_tim.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_tim.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_usart.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f37x_wwdg.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F37x_StdPeriph_Driver/src/stm32f37x_wwdg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f37x.s</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F37x/Source/Templates/TrueSTUDIO/startup_stm32f37x.s</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_init.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/flash_if.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..ab00129 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Thu Dec 13 17:34:36 GMT+01:00 2012 +BOARD=STM32373C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F373VC +MCU_VENDOR=STMicroelectronics +MODEL=Pro +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=ARM\u00AE +VERSION=3.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch new file mode 100644 index 0000000..734d809 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # The executable starts automatically"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="E:\SVN\STM32_USB-FS-Device_Lib\Projects\Custom_HID\TrueSTUDIO\STM32373C-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32373C-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32373C-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32373C-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld new file mode 100644 index 0000000..35c7d30 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F373VC Device with +** 256KByte FLASH, 32KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of 32K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 256K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.project new file mode 100644 index 0000000..46ed9a9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.project @@ -0,0 +1,246 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L152_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_STM32L1xx.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/system_STM32L1xx.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/readme.txt</locationURI> + </link> + <link> + <name>STM32L152_EVAL/stm32l152_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152_EVAL/stm32l152_eval.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_exti.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_flash.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_gpio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_rcc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_spi.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_usart.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_flash_ramfunc.c</name> + <type>1</type> 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/flash_if.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..f14d2cd --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 14:38:58 GMT+01:00 2012 +BOARD=STM32L152-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32L152VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch new file mode 100644 index 0000000..6f7945f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\TrueSTUDIO\STM32L152-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute 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key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld new file mode 100644 index 0000000..1be62d5 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_md Device with +** 128KByte FLASH, 16KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of 16K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x80; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/.cproject 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encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32L152D-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152D-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152D-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld new file mode 100644 index 0000000..0d8b7b3 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_hd Device with +** 384KByte FLASH, 48KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000BFF8; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 384K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewd b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewd new file mode 100644 index 0000000..3472367 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewd @@ -0,0 +1,8092 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>C-SPY</name> + <archiveVersion>2</archiveVersion> + <data> + <version>23</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CInput</name> + <state>1</state> + </option> + <option> + <name>CEndian</name> + <state>1</state> + </option> + <option> + <name>CProcessor</name> + <state>1</state> + </option> + <option> + <name>OCVariant</name> + <state>0</state> + </option> + <option> + <name>MacOverride</name> + <state>0</state> + </option> + <option> + <name>MacFile</name> + <state></state> + </option> + <option> + <name>MemOverride</name> + <state>0</state> + </option> + <option> + <name>MemFile</name> + <state>$TOOLKIT_DIR$\CONFIG\debugger\ST\STM32F103xE.ddf</state> + </option> + <option> + <name>RunToEnable</name> + <state>1</state> + </option> + <option> + <name>RunToName</name> + <state>main</state> + </option> + <option> + <name>CExtraOptionsCheck</name> + <state>0</state> + </option> + <option> + <name>CExtraOptions</name> + <state></state> + </option> + <option> + <name>CFpuProcessor</name> + <state>1</state> + </option> + <option> + <name>OCDDFArgumentProducer</name> + <state></state> + </option> + <option> + <name>OCDownloadSuppressDownload</name> + <state>0</state> + </option> + <option> + <name>OCDownloadVerifyAll</name> + <state>1</state> + </option> + <option> + <name>OCProductVersion</name> + <state>4.41A</state> + </option> + <option> + <name>OCDynDriverList</name> + <state>STLINK_ID</state> + </option> + <option> + <name>OCLastSavedByProductVersion</name> + <state>6.40.1.53794</state> + </option> + <option> + <name>OCDownloadAttachToProgram</name> + <state>0</state> + </option> + <option> + <name>UseFlashLoader</name> + <state>1</state> + </option> + <option> + <name>CLowLevel</name> + <state>1</state> + </option> + <option> + <name>OCBE8Slave</name> + <state>1</state> + </option> + <option> + <name>MacFile2</name> + <state></state> + </option> + <option> + <name>CDevice</name> + <state>1</state> + </option> + <option> + <name>FlashLoadersV3</name> + <state>$TOOLKIT_DIR$\config\flashloader\ST\FlashSTM32F10xxE.board</state> + </option> + <option> + <name>OCImagesSuppressCheck1</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath1</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck2</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath2</name> + <state></state> + </option> + <option> + <name>OCImagesSuppressCheck3</name> + <state>0</state> + </option> + <option> + <name>OCImagesPath3</name> + <state></state> + </option> + <option> + <name>OverrideDefFlashBoard</name> + <state>0</state> + </option> + <option> + <name>OCImagesOffset1</name> + <state></state> + </option> + <option> + <name>OCImagesOffset2</name> + <state></state> + </option> + <option> + <name>OCImagesOffset3</name> + <state></state> + </option> + <option> + <name>OCImagesUse1</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse2</name> + <state>0</state> + </option> + <option> + <name>OCImagesUse3</name> + <state>0</state> + </option> + <option> + <name>OCDeviceConfigMacroFile</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>ARMSIM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCSimDriverInfo</name> + <state>1</state> + </option> + <option> + <name>OCSimEnablePSP</name> + <state>0</state> + </option> + <option> + <name>OCSimPspOverrideConfig</name> + <state>0</state> + </option> + <option> + <name>OCSimPspConfigFile</name> + <state></state> + </option> + </data> + </settings> + <settings> + <name>ANGEL_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CCAngelHeartbeat</name> + <state>1</state> + </option> + <option> + <name>CAngelCommunication</name> + <state>1</state> + </option> + <option> + <name>CAngelCommBaud</name> + <version>0</version> + <state>3</state> + </option> + <option> + <name>CAngelCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>ANGELTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoAngelLogfile</name> + <state>0</state> + </option> + <option> + <name>AngelLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>GDBSERVER_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>TCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>DoLogfile</name> + <state>0</state> + </option> + <option> + <name>LogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJTagBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJTagDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJTagUpdateBreakpoints</name> + <state>main</state> + </option> + </data> + </settings> + <settings> + <name>IARROM_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>1</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>CRomLogFileCheck</name> + <state>0</state> + </option> + <option> + <name>CRomLogFileEditB</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CRomCommPort</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>CRomCommBaud</name> + <version>0</version> + <state>7</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + </data> + </settings> + <settings> + <name>IJET_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>0</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>IjetAttachSlave</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeScriptFile</name> + <state>1</state> + </option> + <option> + <name>OCIarProbeConfigFile</name> + <state>1</state> + </option> + <option> + <name>IjetResetList</name> + <version>0</version> + <state>9</state> + </option> + <option> + <name>IjetHWResetDuration</name> + <state>300</state> + </option> + <option> + <name>IjetHWResetDelay</name> + <state>200</state> + </option> + <option> + <name>IjetPowerFromProbe</name> + <state>1</state> + </option> + <option> + <name>IjetPowerRadio</name> + <state>1</state> + </option> + <option> + <name>IjetDoLogfile</name> + <state>0</state> + </option> + <option> + <name>IjetLogFile</name> + <state>$PROJ_DIR$\cspycomm.log</state> + </option> + <option> + <name>IjetInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>IjetInterfaceCmdLine</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTargetEnable</name> + <state>0</state> + </option> + <option> + <name>IjetMultiTarget</name> + <state>0</state> + </option> + <option> + <name>IjetScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>IjetIRLength</name> + <state>0</state> + </option> + <option> + <name>IjetJtagSpeedList</name> + <version>0</version> + <state>0</state> + </option> + <option> + <name>IjetProtocolRadio</name> + <state>0</state> + </option> + <option> + <name>IjetSwoPin</name> + <state>0</state> + </option> + <option> + <name>IjetCpuClockEdit</name> + <state>72.0</state> + </option> + <option> + <name>IjetSwoPrescalerList</name> + <version>1</version> + <state>0</state> + </option> + <option> + <name>IjetBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>IjetRestoreBreakpointsCheck</name> + <state>0</state> + </option> + <option> + <name>IjetUpdateBreakpointsEdit</name> + <state>_call_main</state> + </option> + <option> + <name>RDICatchReset</name> + <state>0</state> + </option> + <option> + <name>RDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>RDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>RDICatchData</name> + <state>0</state> + </option> + <option> + <name>RDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>RDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>RDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CatchCORERESET</name> + <state>0</state> + </option> + <option> + <name>CatchMMERR</name> + <state>0</state> + </option> + <option> + <name>CatchNOCPERR</name> + <state>0</state> + </option> + <option> + <name>CatchCHKERR</name> + <state>0</state> + </option> + <option> + <name>CatchSTATERR</name> + <state>0</state> + </option> + <option> + <name>CatchBUSERR</name> + <state>0</state> + </option> + <option> + <name>CatchINTERR</name> + <state>0</state> + </option> + <option> + <name>CatchHARDERR</name> + <state>0</state> + </option> + <option> + <name>CatchDummy</name> + <state>0</state> + </option> + </data> + </settings> + <settings> + <name>JLINK_ID</name> + <archiveVersion>2</archiveVersion> + <data> + <version>14</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>JLinkSpeed</name> + <state>32</state> + </option> + <option> + <name>CCJLinkDoLogfile</name> + <state>0</state> + </option> + <option> + <name>CCJLinkLogFile</name> + <state>$TOOLKIT_DIR$\cspycomm.log</state> + </option> + <option> + <name>CCJLinkHWResetDelay</name> + <state>0</state> + </option> + <option> + <name>OCDriverInfo</name> + <state>1</state> + </option> + <option> + <name>JLinkInitialSpeed</name> + <state>32</state> + </option> + <option> + <name>CCDoJlinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCScanChainNonARMDevices</name> + <state>0</state> + </option> + <option> + <name>CCJLinkMultiTarget</name> + <state>0</state> + </option> + <option> + <name>CCJLinkIRLength</name> + <state>0</state> + </option> + <option> + <name>CCJLinkCommRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkTCPIP</name> + <state>aaa.bbb.ccc.ddd</state> + </option> + <option> + <name>CCJLinkSpeedRadioV2</name> + <state>0</state> + </option> + <option> + <name>CCUSBDevice</name> + <version>1</version> + <state>1</state> + </option> + <option> + <name>CCRDICatchReset</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchUndef</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchSWI</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchData</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchPrefetch</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchIRQ</name> + <state>0</state> + </option> + <option> + <name>CCRDICatchFIQ</name> + <state>0</state> + </option> + <option> + <name>CCJLinkBreakpointRadio</name> + <state>0</state> + </option> + <option> + <name>CCJLinkDoUpdateBreakpoints</name> + <state>0</state> + </option> + <option> + <name>CCJLinkUpdateBreakpoints</name> + <state>main</state> + </option> + <option> + <name>CCJLinkInterfaceRadio</name> + <state>0</state> + </option> + <option> + <name>OCJLinkAttachSlave</name> + <state>1</state> + </option> + <option> + <name>CCJLinkResetList</name> + <version>6</version> + <state>10</state> + </option> + <option> + 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<file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file> + <loadFlag>1</loadFlag> + </plugin> + </debuggerPlugins> + </configuration> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewp b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewp new file mode 100644 index 0000000..257632b --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.ewp @@ -0,0 +1,6777 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<project> + <fileVersion>2</fileVersion> + <configuration> + <name>STM3210E-EVAL</name> + <toolchain> + <name>ARM</name> + </toolchain> + <debug>1</debug> + <settings> + <name>General</name> + <archiveVersion>3</archiveVersion> + <data> + <version>21</version> + <wantNonLocal>1</wantNonLocal> + <debug>1</debug> + <option> + <name>ExePath</name> + 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<group> + <name>STM32L152D_EVAL</name> + <excluded> + <configuration>STM32L152_EVAL</configuration> + </excluded> + <file> + <name>$PROJ_DIR$\..\..\..\..\Utilities\STM32_EVAL\STM32L152D_EVAL\stm32l152d_eval.c</name> + </file> + </group> + <group> + <name>STM32L1xx_StdPeriph_Driver</name> + <excluded> + <configuration>STM3210B-EVAL</configuration> + <configuration>STM3210E-EVAL_XL</configuration> + </excluded> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\misc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\stm32l1xx_flash.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\stm32l1xx_gpio.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\stm32l1xx_rcc.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\stm32l1xx_syscfg.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\src\stm32l1xx_usart.c</name> + </file> + </group> + </group> + <group> + <name>User</name> + <file> + <name>$PROJ_DIR$\..\src\main.c</name> + </file> + <file> + <name>$PROJ_DIR$\..\src\stm32_it.c</name> + </file> + </group> +</project> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.eww b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.eww new file mode 100644 index 0000000..d162f4d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/SysTick.eww @@ -0,0 +1,34 @@ +<?xml version="1.0" encoding="iso-8859-1"?> + +<workspace> + <project> + <path>$WS_DIR$\SysTick.ewp</path> + </project> + <batchBuild> + <batchDefinition> + <name>USB-Package-SysTick</name> + <member> + <project>SysTick</project> + <configuration>STM3210B-EVAL</configuration> + </member> + <member> + <project>SysTick</project> + <configuration>STM3210C-EVAL</configuration> + </member> + <member> + <project>SysTick</project> + <configuration>STM3210E-EVAL</configuration> + </member> + <member> + <project>SysTick</project> + <configuration>STM3210E-EVAL_XL</configuration> + </member> + <member> + <project>SysTick</project> + <configuration>STM32L152-EVAL</configuration> + </member> + </batchDefinition> + </batchBuild> +</workspace> + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f10x_flash_offset.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f10x_flash_offset.icf new file mode 100644 index 0000000..464f800 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f10x_flash_offset.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08003000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08003000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20017FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f30x_flash_offset.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f30x_flash_offset.icf new file mode 100644 index 0000000..48a7502 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f30x_flash_offset.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08003000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08003000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32l1xx_flash_offset.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32l1xx_flash_offset.icf new file mode 100644 index 0000000..80c8d4a --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32l1xx_flash_offset.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08003000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08003000 ; +define symbol __ICFEDIT_region_ROM_end__ = 0x0805FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2000BFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x200; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvproj b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvproj new file mode 100644 index 0000000..72347a2 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvproj @@ -0,0 +1,12188 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>STM3210B-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103VB</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32F10x.s" ("STM32 Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</FlashDriverDll> + <DeviceId>4223</DeviceId> + <RegisterFile>stm32f10x_lib.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile></SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM3210B-EVAL\</OutputDirectory> + <OutputName>STM3210B-EVAL</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\STM3210B-EVAL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103VB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103VB</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>1</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>3</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8003000</StartAddress> + <Size>0x1e000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + 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<SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile></SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM3210E-EVAL\</OutputDirectory> + <OutputName>STM3210E-EVAL</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\STM3210E-EVAL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103ZE</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103ZE</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + 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<Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x80000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8003000</StartAddress> + <Size>0x7e000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x10000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STM3210E_EVAL, STM32F10X_HD, USE_STDPERIPH_DRIVER</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include;..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\..\Utilities\STM32_EVAL\Common;..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + 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<RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + <FileName>stm32_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\stm32_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32f10x.c</FilePath> + </File> + <File> + <FileName>system_stm32l1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32l1xx.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_hd.s</FilePath> + </File> + <File> + <FileName>startup_stm32f10x_ld.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld.s</FilePath> + <FileOption> + <CommonProperty> + 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<FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld_vl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + 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<Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x100000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8003000</StartAddress> + <Size>0xfe000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x18000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STM3210E_EVAL, STM32F10X_HD, USE_STDPERIPH_DRIVER</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\..\Libraries\CMSIS\CM3\CoreSupport;..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include;..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\..\Utilities\STM32_EVAL\Common;..\..\..\..\Utilities\STM32_EVAL\STM3210E_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x08003000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath> + </File> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + <FileName>stm32_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\stm32_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32f10x.c</FilePath> + </File> + <File> + <FileName>system_stm32l1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32l1xx.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_hd.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_ld.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_ld_vl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_ld_vl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_md.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_md.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_md_vl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_md_vl.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_xl.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_xl.s</FilePath> + </File> + <File> + <FileName>startup_stm32l1xx_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_hd.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32l1xx_md.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_md.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32l1xx_mdp.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Source\Templates\arm\startup_stm32l1xx_mdp.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + <interw>2</interw> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <thumb>2</thumb> + <SplitLS>2</SplitLS> + <SwStkChk>2</SwStkChk> + <NoWarn>2</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f37x.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\..\Libraries\CMSIS\Device\ST\STM32F37x\Source\Templates\arm\startup_stm32f37x.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Aads> + 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+ <Files> + <File> + <FileName>stm32303c_eval.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\..\Utilities\STM32_EVAL\STM32303C_EVAL\stm32303c_eval.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>Doc</GroupName> + <Files> + <File> + <FileName>readme.txt</FileName> + <FileType>5</FileType> + <FilePath>..\readme.txt</FilePath> + </File> + </Files> + </Group> + </Groups> + </Target> + </Targets> + +</Project> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/SysTick.rprj b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/SysTick.rprj new file mode 100644 index 0000000..0204755 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/SysTick.rprj @@ -0,0 +1,4 @@ + +<Project Header="Project 'SysTick'" Path=".\SysTick.rprj" Project="Yes" OutputFile="" sate="96" ActiveApp="SysTick" > + <ApplicationBuild Header="SysTick" Extern=".\SysTick.rapp" Path=".\SysTick.rapp" OutputFile=".\STM32F303C_EVAL\SysTick.elf" sate="98" Config="STM32F303C_EVAL" /> +</Project>
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_md_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_md_flash_offset.ld new file mode 100644 index 0000000..457a3ed --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_md_flash_offset.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F10x_128_20K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F10x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F10x definitions with 128K Flash and 20K RAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 128K-0x3000 + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x20005000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_xl_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_xl_flash_offset.ld new file mode 100644 index 0000000..3710a92 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_xl_flash_offset.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F10x_1024_96K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F10x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F10x definitions with 1024k Flash and 96K RAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 1024K-0x3000 + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x20018000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f37x_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f37x_flash_offset.ld new file mode 100644 index 0000000..27d3b3b --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f37x_flash_offset.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F37x_256K_32K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F37x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F37x definitions with 256K Flash and 32K RAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 256K-0x3000 + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x20008000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git 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100644 index 0000000..04775cb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210B-EVAL/.project @@ -0,0 +1,127 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210B-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM3210B_EVAL</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/readme.txt</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + 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key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM3210B-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM3210B-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210B-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210B-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl new file mode 100644 index 0000000..3c59ebf --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210B-EVAL/TASKING/STM32F10x_md.lsl @@ -0,0 +1,148 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 20k; + map ( size = 20k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector( id = 2, optional, fill = "NMI_Handler" ); /* 2 Non Maskable Interrupt */ + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN RX0 + vector ( id = 37, optional, fill = "CAN_RX1_IRQHandler" ); // CAN RX1 + vector ( id = 38, optional, fill = "CAN_SCE_IRQHandler" ); // CAN SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + + } +} +# endif diff --git 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/STM3210E-EVAL.launch new file mode 100644 index 0000000..547d59a --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/STM3210E-EVAL.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM3210E-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM3210E-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210E-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210E-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/STM3210E.dfu b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/STM3210E.dfu Binary files differnew file mode 100644 index 0000000..935edbc --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/STM3210E.dfu diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl new file mode 100644 index 0000000..1c37d81 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 64k; + map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector( id = 2, optional, fill = "NMI_Handler" ); /* 2 Non Maskable Interrupt */ + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN_RX1_IRQHandler" ); // CAN RX1 + vector ( id = 38, optional, fill = "CAN_SCE_IRQHandler" ); // CAN SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/.cproject new file mode 100644 index 0000000..61ef849 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/.cproject @@ -0,0 +1,135 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.tasking.config.arm.abs.debug.2044455393"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings/> + <extensions> + <extension id="com.tasking.managedbuilder.TASKING_ELF" point="org.eclipse.cdt.core.BinaryParser"/> + <extension id="com.tasking.managedbuilder.TskRegexErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + </extensions> + </storageModule> + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> + <configuration artifactExtension="abs" artifactName="STM3210E-EVAL_XL" buildArtefactType="com.tasking.arm.buildArtefactType.elf" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.tasking.arm.buildArtefactType.elf" cleanCommand=""${PRODDIR}/bin/rm" -rf" description="" id="com.tasking.config.arm.abs.debug.2044455393" name="Debug" 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problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/> + </scannerConfigBuildInfo> + <scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.debug.2044455393;com.tasking.config.arm.abs.debug.2044455393."> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/> + </scannerConfigBuildInfo> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.language.mapping"> + <project-mappings> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.tasking.arm.clanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.tasking.arm.clanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.tasking.arm.cpplanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.tasking.arm.cpplanguage"/> + </project-mappings> + </storageModule> + <storageModule moduleId="refreshScope" versionNumber="1"> + <resource resourceType="PROJECT" workspacePath="/STM3210B-EVAL"/> + </storageModule> +</cproject> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/.launch new file mode 100644 index 0000000..4635ffb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> + <booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> + 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<natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32F30x</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>PARENT-1-PROJECT_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>stm32f30x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_i2c.c</locationURI> + </link> + <link> + <name>stm32f30x_spi.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_spi.c</locationURI> + </link> + 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<name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_flash.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_flash.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_gpio.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_misc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_pwr.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_pwr.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_rcc.c</locationURI> + </link> + <link> + <name>STM32F30x/STM32F30x_StdPeriph_Driver/stm32f30x_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_syscfg.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/STM32303C_EVAL.hex b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/STM32303C_EVAL.hex new file mode 100644 index 0000000..45b8115 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/STM32303C_EVAL.hex @@ -0,0 +1,55 @@ +:020000040800F2 +:2030000000A000206134000835350008393500083D35000841350008453500081C3000089D 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a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl new file mode 100644 index 0000000..642584a --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl @@ -0,0 +1,211 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f30x.lsl +// +// Version : @(#)stm32f30x.lsl 1.1 12/07/27 +// +// Description : LSL file for the STMicroelectronics STM32F30x +// +// Copyright 2012 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32F30x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMSIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 98 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x20000000 +#endif + + +#ifndef __STACK +# define __STACK 6k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 256k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif + +memory STM32F30x_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + priority = 2; + map ( size = __SRAM_SIZE - 8k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM8k +{ + mau = 8; + type = ram; + size = 8k; + priority = 1; + map ( size = 8k, dest_offset=0x10000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Define the vector table for CMSIS +// +#ifdef __CMSIS_VECTORS +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); // NMI Handler + vector ( id = 3, optional, fill = "HardFault_Handler" ); // Hard Fault Handler + vector ( id = 4, optional, fill = "MemManage_Handler" ); // MPU Fault Handler + vector ( id = 5, optional, fill = "BusFault_Handler" ); // Bus Fault Handler + vector ( id = 6, optional, fill = "UsageFault_Handler" ); // Usage Fault Handler + vector ( id = 11, optional, fill = "SVC_Handler" ); // SVCall Handler + vector ( id = 12, optional, fill = "DebugMon_Handler" ); // Debug Monitor Handler + vector ( id = 14, optional, fill = "PendSV_Handler" ); // PendSV Handler + vector ( id = 15, optional, fill = "SysTick_Handler" ); // SysTick Handler + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper amd TimeStanp through EXTI + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC Wakeup through the EXTI line + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash global interrupt + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC global interrupt + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 interrupt + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 interrupt + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 interrupt + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 interrupt + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 interrupt + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1 global interrupt + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA1 Channel 2 global interrupt + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA1 Channel 3 global interrupt + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA1 Channel 4 global interrupt + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA1 Channel 5 global interrupt + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA1 Channel 6 global interrupt + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA1 Channel 7 global interrupt + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 global interrupts + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB Device High Priority or CAN1 TX interrupts + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB Device Low Priority or CAN1 RX0 interrupts + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 interrupt + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE interrupt + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 interrupts + vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" ); // TIM1 Break irq and TIM15 global interrupt + vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" ); // TIM1 Update irq and TIM16 global interrupt + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" ); // TIM1 Trigger and Commutation irqs and TIM17 global irq + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 global interrupt + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 global interrupt + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 global interrupt + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 global interrupt + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 global interrupt + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 global interrupt + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 global interrupt + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 global interrupt + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 interrupts + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup interrupt + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break interrupt + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update interrupt + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 trigger and Comm. interrupt + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare interrupt + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 global interrupt + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 global interrupt + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 global interrupt + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 global interrupt + vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6 glbl irq, DAC1 and DAC2 underrun err irqs + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 global interrupt + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel 1 global interrupt + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel 2 global interrupt + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel 3 global interrupt + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel 4 global interrupt + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel 5 global interrupt + vector ( id = 77, optional, fill = "ADC4_IRQHandler" ); // ADC4 global interrupt + vector ( id = 80, optional, fill = "COMP1_2_3_IRQHandler" ); // COMP1, COMP2 and COMP3 global interrupt + vector ( id = 81, optional, fill = "COMP4_5_6_IRQHandler" ); // COMP5, COMP6 and COMP4 global interrupt + vector ( id = 82, optional, fill = "COMP7_IRQHandler" ); // COMP7 global interrupt + vector ( id = 90, optional, fill = "USB_HP_IRQHandler" ); // USB High Priority global Interrupt remap + vector ( id = 91, optional, fill = "USB_LP_IRQHandler" ); // USB Low Priority global Interrupt remap + vector ( id = 92, optional, fill = "USBWakeUp_RMP_IRQHandler" ); // USB Wakeup Interrupt remap + vector ( id = 97, optional, fill = "FPU_IRQHandler" ); // Floating point Interrupt + } +} +#endif /* __CMSIS_VECTORS */ diff --git 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workspacePath="/STM3210B-EVAL"/> + </storageModule> +</cproject> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.project new file mode 100644 index 0000000..9096c12 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.project @@ -0,0 +1,132 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32373C_EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + 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file mode 100644 index 0000000..38945e9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/TASKING/stm32f37x.lsl @@ -0,0 +1,200 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f37x.lsl +// +// Version : @(#)stm32f37x.lsl 1.1 12/07/27 +// +// Description : LSL file for the STMicroelectronics STM32F37x +// +// Copyright 2012 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32F37x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMSIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 98 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x20000000 +#endif + + +#ifndef __STACK +# define __STACK 4k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 256k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 32k +#endif + +memory STM32F37x_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory STM32F37x_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + priority = 2; + map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Define the vector table for CMSIS +// +#ifdef __CMSIS_VECTORS +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); // NMI Handler + vector ( id = 3, optional, fill = "HardFault_Handler" ); // Hard Fault Handler + vector ( id = 4, optional, fill = "MemManage_Handler" ); // MPU Fault Handler + vector ( id = 5, optional, fill = "BusFault_Handler" ); // Bus Fault Handler + vector ( id = 6, optional, fill = "UsageFault_Handler" ); // Usage Fault Handler + vector ( id = 11, optional, fill = "SVC_Handler" ); // SVCall Handler + vector ( id = 12, optional, fill = "DebugMon_Handler" ); // Debug Monitor Handler + vector ( id = 14, optional, fill = "PendSV_Handler" ); // PendSV Handler + vector ( id = 15, optional, fill = "SysTick_Handler" ); // SysTick Handler + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper amd TimeStanp through EXTI + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC Wakeup through the EXTI line + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash global interrupt + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC global interrupt + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 interrupt + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 interrupt + vector ( id = 24, optional, fill = "EXTI2_TS_IRQHandler" ); // EXTI2_TS_IRQHandler interrupt + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 interrupt + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 interrupt + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1 global interrupt + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA1 Channel 2 global interrupt + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA1 Channel 3 global interrupt + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA1 Channel 4 global interrupt + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA1 Channel 5 global interrupt + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA1 Channel 6 global interrupt + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA1 Channel 7 global interrupt + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1 interrupts + vector ( id = 35, optional, fill = "CAN1_TX_IRQHandler" ); // CAN1 TX interrupts + vector ( id = 36, optional, fill = "CAN1_RX0_IRQHandler" ); // CAN1 RX0 interrupts + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 interrupt + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE interrupt + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 interrupts + vector ( id = 40, optional, fill = "TIM15_IRQHandler" ); // TIM15 global interrupt + vector ( id = 41, optional, fill = "TIM16_IRQHandler" ); // TIM16 global interrupt + vector ( id = 42, optional, fill = "TIM17_IRQHandler" ); // TIM17 global interrupt + vector ( id = 43, optional, fill = "TIM118_DAC2_IRQHandler" ); // TIM18 global Interrupt and DAC2 underrun Interrupt + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 global interrupt + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 global interrupt + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 global interrupt + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 global interrupt + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 global interrupt + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 global interrupt + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 global interrupt + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 global interrupt + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 interrupts + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "CEC_IRQHandler" ); // CEC interrupt + vector ( id = 59, optional, fill = "TIM12_IRQHandler" ); // TIM12 global interrupt + vector ( id = 60, optional, fill = "TIM13_IRQHandler" ); // TIM13 global interrupt + vector ( id = 61, optional, fill = "TIM14_IRQHandler" ); // TIM14 global interrupt + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 global interrupt + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 global interrupt + vector ( id = 70, optional, fill = "TIM6_DAC1_IRQHandler" ); // TIM6 glbl irq, DAC1 CH1 & CH2 underrun err irqs + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 global interrupt + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel 1 global interrupt + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel 2 global interrupt + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel 3 global interrupt + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel 4 global interrupt + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel 5 global interrupt + vector ( id = 77, optional, fill = "SDADC1_IRQHandler" ); // ADC Sigma Delta 1 global Interrupt + vector ( id = 78, optional, fill = "SDADC2_IRQHandler" ); // ADC Sigma Delta 2 global Interrupt + vector ( id = 79, optional, fill = "SDADC3_IRQHandler" ); // ADC Sigma Delta 3 global Interrupt + vector ( id = 80, optional, fill = "COMP_IRQHandler" ); // COMP1 and COMP2 global interrupt + vector ( id = 90, optional, fill = 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+:2034E00031F07F0108435FF0E021C1F8080D70470249086008680028FCD17047000000201C +:123500005FF000605FF44051FFF7E8BF0320029070471D +:06351400FFF7D6BF70476F +:02351C00FEE7C8 +:02352000FEE7C4 +:02352400FEE7C0 +:02352800FEE7BC +:02352C007047E6 +:023530007047E2 +:023534007047DE +:02353800FEE7AC +:20353C00010000000000002050310008300000000000000000000000000000000000000095 +:040000050800343D7E +:00000001FF diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch new file mode 100644 index 0000000..d494039 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="J-Link over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32L152-EVAL"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="dijlinkarm"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32l1xx.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32L152-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl new file mode 100644 index 0000000..44fb640 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl @@ -0,0 +1,151 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx_cmsis.lsl +// +// Version : @(#)stm32l1xx_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32l1xx.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 84 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 1k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32l1xflash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory stm32l1xram +{ + mau = 8; + type = ram; + size = 16k; + map ( size = 16k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandle" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/vssver.scc b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/vssver.scc Binary files differnew file mode 100644 index 0000000..42ae08e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152-EVAL/TASKING/vssver.scc diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/.project new file mode 100644 index 0000000..d688a4d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/.project @@ -0,0 +1,132 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152D-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>com.tasking.arm.TskManagedBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + <nature>com.tasking.arm.target</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32L152D_EVAL</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>WORKSPACE_LOC/.metadata/Link</locationURI> + </link> + <link> + <name>CMSIS/system_stm32l1xx.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32l1xx.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/readme.txt</locationURI> + </link> + <link> + <name>STM32L152D_EVAL/stm32l152d_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_dma.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_dma.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_exti.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_exti.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_flash.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_flash.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_gpio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_i2c.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_i2c.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_rcc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_sdio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_sdio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_spi.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_spi.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_syscfg.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_tim.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_tim.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_usart.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl new file mode 100644 index 0000000..39e2cf2 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32L152D-EVAL/TASKING/stm32l1xx_hd.lsl @@ -0,0 +1,205 @@ +/////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx.lsl +// +// Version : @(#)stm32l1xx.lsl 1.5 11/06/30 +// +// Description : LSL file for the STMicroelectronics STM32L1xx +// +// Copyright 2010-2011 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __EEPROM_SIZE Specifies the size of the EEPROM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 73 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x00000000 +#endif + + +#ifndef __STACK +# define __STACK 4k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 384k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif +#ifndef __EEPROM_SIZE +# define __EEPROM_SIZE 4k +#endif + +memory STM32L1xx_Flash +{ + mau = 8; + type = rom; + size = 372k; + map ( size = 372k, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_EEPROM +{ + mau = 8; + type = reserved rom; + size = __EEPROM_SIZE; + map ( size = __EEPROM_SIZE, dest_offset=0x08080000, dest=bus:ARM:local_bus); +} + +memory STM32L1xx_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + map ( size = __SRAM_SIZE, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + vector ( id = 61, optional, fill = "SDIO_IRQHandler" ); // SDIO_IRQHandler + vector ( id = 62, optional, fill = "TIM5_IRQHandler" ); //TIM5_IRQHandler + vector ( id = 63, optional, fill = "SPI3_IRQHandler" ); //SPI3_IRQHandler + vector ( id = 64, optional, fill = "UART4_IRQHandler" ); //UART4_IRQHandler + vector ( id = 65, optional, fill = "UART5_IRQHandler" ); //UART5_IRQHandler + vector ( id = 66, optional, fill = "DMA2_Channel1_IRQHandler" ); //DMA2_Channel1_IRQHandler + vector ( id = 67, optional, fill = "DMA2_Channel2_IRQHandler" ); //DMA2_Channel2_IRQHandler + vector ( id = 68, optional, fill = "DMA2_Channel3_IRQHandler" ); //DMA2_Channel3_IRQHandler + vector ( id = 69, optional, fill = "DMA2_Channel4_IRQHandler" ); //DMA2_Channel4_IRQHandler + vector ( id = 70, optional, fill = "DMA2_Channel5_IRQHandler" ); //DMA2_Channel5_IRQHandler + vector ( id = 71, optional, fill = "AES_IRQHandler" ); //AES_IRQHandler + vector ( id = 72, optional, fill = "COMP_ACQ_IRQHandler" ); //Comparator Channel Acquisition + + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.project new file mode 100644 index 0000000..53578d0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.project @@ -0,0 +1,156 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210B-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM3210B_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/readme.txt</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_md.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_md.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..a67aafc --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:00:38 GMT+01:00 2012 +BOARD=STM3210B-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch new file mode 100644 index 0000000..bae3840 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\binary_template\TrueSTUDIO\STM3210B-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM3210B-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210B-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210B-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld new file mode 100644 index 0000000..baccc21 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210B-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103VB Device with +** 128KByte FLASH, 20KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20005000; /* end of 20K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 128K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/.cproject 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..c34efa7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:01:09 GMT+01:00 2012 +BOARD=STM3210E-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZE +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch new file mode 100644 index 0000000..77034d7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\binary_template\TrueSTUDIO\STM3210E-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM3210E-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210E-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210E-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld new file mode 100644 index 0000000..54fc800 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZE Device with +** 512KByte FLASH, 64KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20010000; /* end of 64K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 512K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/.cproject 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<name>STM3210E-EVAL_XL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM32F103ZG/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + 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<name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM3210E_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/readme.txt</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_xl.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_xl.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..4f59879 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:01:27 GMT+01:00 2012 +BOARD=STM3210E-EVAL_XL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F103ZG +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/STM32F10X_XL.elf.launch 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</projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?children?</key> + <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\||</value> + </dictionary> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210E-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32303C_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f30x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f30x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Custom_HID/readme.txt</locationURI> + </link> + <link> + <name>STM32303C_EVAL/stm32303c_eval.c</name> + <type>1</type> + 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+ <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dac.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_dbgmcu.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dbgmcu.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_dma.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dma.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_exti.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_exti.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_flash.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_flash.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_gpio.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_i2c.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_iwdg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_iwdg.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_misc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_opamp.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_opamp.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_pwr.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_pwr.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_rcc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_rtc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_rtc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_spi.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_spi.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_syscfg.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_tim.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_tim.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_usart.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_wwdg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_wwdg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f30x.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F30x/Source/Templates/TrueSTUDIO/startup_stm32f30x.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..11c9ee7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Thu Dec 13 17:37:51 GMT+01:00 2012 +BOARD=STM32303C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F303VC +MCU_VENDOR=STMicroelectronics +MODEL=Pro +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=ARM\u00AE +VERSION=3.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/org.eclipse.cdt.managedbuilder.core.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/org.eclipse.cdt.managedbuilder.core.prefs new file mode 100644 index 0000000..57e0178 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/.settings/org.eclipse.cdt.managedbuilder.core.prefs @@ -0,0 +1,12 @@ +#Wed Dec 26 09:33:09 GMT+01:00 2012 +eclipse.preferences.version=1 +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/CPATH/delimiter=; +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/CPATH/operation=remove +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/C_INCLUDE_PATH/delimiter=; +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/C_INCLUDE_PATH/operation=remove +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/append=true +environment/buildEnvironmentInclude/com.atollic.truestudio.exe.debug.311825581/appendContributed=true +environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.311825581/LIBRARY_PATH/delimiter=; +environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.311825581/LIBRARY_PATH/operation=remove +environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.311825581/append=true +environment/buildEnvironmentLibrary/com.atollic.truestudio.exe.debug.311825581/appendContributed=true diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch new file mode 100644 index 0000000..53aeace --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32303C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # The executable starts automatically"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="E:\SVN\STM32_USB-FS-Device_Lib\Projects\Custom_HID\TrueSTUDIO\STM32303C-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32303C-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32303C-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32303C-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld new file mode 100644 index 0000000..1a50ba4 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32303C-EVAL/STM32F303VC_FLASH.ld @@ -0,0 +1,190 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F303VC Device with +** 256KByte FLASH, 40KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000a000; /* end of 40K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x200; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 256K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 40K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K + CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 8K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.cproject new file mode 100644 index 0000000..c871fdb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.cproject @@ -0,0 +1,355 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.atollic.truestudio.exe.debug.311825581"> + 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<locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F37x/Source/Templates/TrueSTUDIO/startup_stm32f37x.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..ab00129 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Thu Dec 13 17:34:36 GMT+01:00 2012 +BOARD=STM32373C-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32F373VC +MCU_VENDOR=STMicroelectronics +MODEL=Pro +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=ARM\u00AE +VERSION=3.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld new file mode 100644 index 0000000..4d3c6e2 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32F373VC_FLASH.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F373VC Device with +** 256KByte FLASH, 32KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20008000; /* end of 32K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x100; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 256K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/.cproject 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/.project @@ -0,0 +1,156 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L152_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_STM32L1xx.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/system_STM32L1xx.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/readme.txt</locationURI> + </link> + <link> + <name>STM32L152_EVAL/stm32l152_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152_EVAL/stm32l152_eval.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_gpio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_rcc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_usart.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_syscfg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_STM32L1xx_md.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32L1xx/Source/Templates/TrueSTUDIO/startup_STM32L1xx_md.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..65faca9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 15:02:03 GMT+01:00 2012 +BOARD=STM32L152-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32L152VB +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch new file mode 100644 index 0000000..9c000ef --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/STM32L152-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\binary_template\TrueSTUDIO\STM32L152-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32L152-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld new file mode 100644 index 0000000..865fc02 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_md Device with +** 128KByte FLASH, 16KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of 16K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x80; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 128K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.cproject new file mode 100644 index 0000000..ada6144 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.cproject @@ -0,0 +1,266 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> +<storageModule moduleId="org.eclipse.cdt.core.settings"> +<cconfiguration id="com.atollic.truestudio.exe.debug.316348137"> +<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.atollic.truestudio.exe.debug.316348137" moduleId="org.eclipse.cdt.core.settings" name="Debug"> +<externalSettings> +<externalSetting languages="com.atollic.truestudio.gcc.input.1633913031"/> +</externalSettings> +<extensions> +<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/> +<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> +</extensions> +</storageModule> +<storageModule moduleId="cdtBuildSystem" version="4.0.0"> +<configuration artifactExtension="elf" artifactName="STM32L152D-EVAL" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="" id="com.atollic.truestudio.exe.debug.316348137" name="Debug" parent="com.atollic.truestudio.exe.debug" postbuildStep="" prebuildStep=""> +<folderInfo id="com.atollic.truestudio.exe.debug.316348137." name="/" resourcePath=""> +<toolChain id="com.atollic.truestudio.exe.debug.toolchain.1057655060" name="Atollic ARM Tools" superClass="com.atollic.truestudio.exe.debug.toolchain"> +<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="com.atollic.truestudio.exe.debug.toolchain.platform.734843313" isAbstract="false" name="Debug platform" superClass="com.atollic.truestudio.exe.debug.toolchain.platform"/> +<builder buildPath="${workspace_loc:/STM3210B-EVAL/Debug}" id="com.atollic.truestudio.mbs.builder1.290457456" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="CDT Internal Builder" superClass="com.atollic.truestudio.mbs.builder1"/> +<tool command="arm-atollic-eabi-gcc -c" commandLinePattern="${COMMAND} ${FLAGS} ${OUTPUT_FLAG}${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" id="com.atollic.truestudio.exe.debug.toolchain.as.732033945" name="Assembler" superClass="com.atollic.truestudio.exe.debug.toolchain.as"> +<option id="com.atollic.truestudio.common_options.target.endianess.1322668714" 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projectType="com.atollic.truestudio.exe"/> +</storageModule> +</cproject> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.project new file mode 100644 index 0000000..cb881ef --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.project @@ -0,0 +1,156 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152D-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L152D-EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_STM32L1xx.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/system_STM32L1xx.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/readme.txt</locationURI> + </link> + <link> + <name>STM32L152D-EVAL/stm32l152d_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_gpio.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_rcc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/STM32L1xx_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/STM32L1xx_usart.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32L1xx_StdPeriph_Driver/stm32l1xx_syscfg.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32L1xx_StdPeriph_Driver/src/stm32l1xx_syscfg.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_STM32L1xx_md.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32L1xx/Source/Templates/TrueSTUDIO/startup_STM32L1xx_hd.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..fa650d6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 11:48:58 GMT+01:00 2012 +BOARD=STM32L152D-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32L152ZD +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/main.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/main.h new file mode 100644 index 0000000..d0023a8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/main.h @@ -0,0 +1,45 @@ +/** + ****************************************************************************** + * @file main.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for main.c module + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +/* Includes ------------------------------------------------------------------*/ + +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void TimingDelay_Decrement(void); + +#endif /* __MAIN_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/platform_config.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/platform_config.h new file mode 100644 index 0000000..1e54f71 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/platform_config.h @@ -0,0 +1,80 @@ +/** + ****************************************************************************** + * @file platform_config.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Evaluation board specific configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __PLATFORM_CONFIG_H +#define __PLATFORM_CONFIG_H + +/* Includes ------------------------------------------------------------------*/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + #include "stm32l1xx.h" + #if defined (USE_STM32L152_EVAL) + #include "stm32l152_eval.h" + #elif defined (USE_STM32L152D_EVAL) + #include "stm32l152d_eval.h" + #else + #error "Missing define: USE_STM32L152_EVAL or USE_STM32L152D_EVAL" + #endif /* USE_STM32L152_EVAL */ +#elif defined (STM32F10X_MD) || defined (STM32F10X_HD) || defined (STM32F10X_XL) + #include "stm32f10x.h" + #if defined (USE_STM3210B_EVAL) + #include "stm3210b_eval.h" + #elif defined (USE_STM3210E_EVAL) + #include "stm3210e_eval.h" + #else + #error "Missing define: USE_STM3210B_EVAL or USE_STM3210E_EVAL" +#endif /* USE_STM3210B_EVAL */ +#elif defined (USE_STM32373C_EVAL) + #include "stm32f37x.h" + #include "stm32373c_eval.h" +#elif defined (USE_STM32303C_EVAL) + #include "stm32f30x.h" + #include "stm32303c_eval.h" +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line corresponding to the STMicroelectronics evaluation board + used to run the example */ +#if !defined (USE_STM3210B_EVAL) && !defined (USE_STM3210E_EVAL) && !defined (USE_STM32L152_EVAL) && !defined (USE_STM32L152D_EVAL) && !defined (USE_STM32373C_EVAL) && !defined (USE_STM32303C_EVAL) + //#define USE_STM3210B_EVAL + //#define USE_STM3210E_EVAL + //#define USE_STM32L152_EVAL +//#define USE_STM32L152D_EVAL +//#define USE_STM32373C_EVAL +#define USE_STM32303C_EVAL +#endif + + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +#endif /* __PLATFORM_CONFIG_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32_it.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32_it.h new file mode 100644 index 0000000..ce70454 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32_it.h @@ -0,0 +1,55 @@ +/** + ****************************************************************************** + * @file stm32_it.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_IT_H +#define __STM32_IT_H + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + + +#endif /* __STM32_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f10x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f10x_conf.h new file mode 100644 index 0000000..e08299d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f10x_conf.h @@ -0,0 +1,85 @@ +/** + ****************************************************************************** + * @file stm32f10x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment the line below to enable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/******************************************************************************* +* Macro Name : assert_param +* Description : The assert_param macro is used for function's parameters check. +* Input : - expr: If expr is false, it calls assert_failed function +* which reports the name of the source file and the source +* line number of the call that failed. +* If expr is true, it returns no value. +* Return : None +*******************************************************************************/ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f30x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f30x_conf.h new file mode 100644 index 0000000..e716105 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f30x_conf.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file stm32f30x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F30X_CONF_H +#define __STM32F30X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f30x_adc.h" +#include "stm32f30x_can.h" +#include "stm32f30x_crc.h" +#include "stm32f30x_comp.h" +#include "stm32f30x_dac.h" +#include "stm32f30x_dbgmcu.h" +#include "stm32f30x_dma.h" +#include "stm32f30x_exti.h" +#include "stm32f30x_flash.h" +#include "stm32f30x_gpio.h" +#include "stm32f30x_syscfg.h" +#include "stm32f30x_i2c.h" +#include "stm32f30x_iwdg.h" +#include "stm32f30x_opamp.h" +#include "stm32f30x_pwr.h" +#include "stm32f30x_rcc.h" +#include "stm32f30x_rtc.h" +#include "stm32f30x_spi.h" +#include "stm32f30x_tim.h" +#include "stm32f30x_usart.h" +#include "stm32f30x_wwdg.h" +#include "stm32f30x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F30X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32l1xx_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32l1xx_conf.h new file mode 100644 index 0000000..ae4a251 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32l1xx_conf.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file stm32l1xx_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L1xx_CONF_H +#define __STM32L1xx_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment the line below to enable peripheral header file inclusion */ +#include "stm32l1xx_adc.h" +#include "stm32l1xx_crc.h" +#include "stm32l1xx_comp.h" +#include "stm32l1xx_dac.h" +#include "stm32l1xx_dbgmcu.h" +#include "stm32l1xx_dma.h" +#include "stm32l1xx_exti.h" +#include "stm32l1xx_flash.h" +#include "stm32l1xx_gpio.h" +#include "stm32l1xx_syscfg.h" +#include "stm32l1xx_i2c.h" +#include "stm32l1xx_iwdg.h" +#include "stm32l1xx_lcd.h" +#include "stm32l1xx_pwr.h" +#include "stm32l1xx_rcc.h" +#include "stm32l1xx_rtc.h" +#include "stm32l1xx_spi.h" +#include "stm32l1xx_tim.h" +#include "stm32l1xx_usart.h" +#include "stm32l1xx_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval : None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32L1xx_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/readme.txt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/readme.txt new file mode 100644 index 0000000..73a9e4e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/readme.txt @@ -0,0 +1,219 @@ +/** + ****************************************************************************** + * @file readme.txt + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Description of the binary directory. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +Description +=================== +This directory contains a set of sources files that build the application to be +loaded into Flash memory using device firmware upgrade (DFU). + +To build such application, some special configuration has to be preformed: +1. Set the program load address at 0x08003000, using your toolchain linker file +2. Relocate the vector table at address 0x08003000, using the "NVIC_SetVectorTable" + function. + +The SysTick example provided within the STM32F10xxx,STM32L152xxx, STM32F30xxx and STM32F37xxx Standard +Peripheral examples is used as illustration. + +This example configures the SysTick to generate a time base equal to 1 ms. +The system clock is set to 72 MHz for STM32F10xxx, STM32F30xxx and STM32F37xxx devices and to 32MHz for +STM32L15xxx devices, the SysTick is clocked by the AHB clock (HCLK) + +A "Delay" function is implemented based on the SysTick end-of-count event. +Four LEDs are toggled with a timing defined by the Delay function. + + +Directory contents +================== + + + binary_template\EWARM: This folder contains a preconfigured project file + that produces a binary image of SysTick example to be + loaded with DFU. + + + binary_template\RIDE: This folder contains a preconfigured project file + that produces a binary image of SysTick example to be + loaded with DFU. + + + binary_template\MDK-ARM: This folder contains a preconfigured project file + that produces a binary image of SysTick example to be + loaded with DFU. + + + binary_template\TASKING: This folder contains a preconfigured project file + that produces a binary image of SysTick example to be + loaded with DFU. + + + \TrueSTUDIO: This folder contains a preconfigured project file + that produces a binary image of SysTick example to be + loaded with DFU. + + + binary_template\inc: contains the binary_template firmware header files + - stm32f10x_conf.h Library Configuration file for STM32F10xxx devices + - stm32_it.h Header for stm32_it.c + - stm32l15xx_conf.h Library Configuration file for STM32L15xxx devices + - stm32f37x_conf.h Library Configuration file for STM32F37xxx devices + - stm32f30x_conf.h Library Configuration file for STM32F30xxx devices + - main.h Header for main.c + + + binary_template\src: contains the binary_template firmware source files + - main.c Main program + - stm32_it.c Interrupt handlers for STM32F10xxx,STM32L15xxx, STM32F30xxx and STM32F37xxx devices + + +Hardware environment +==================== +This example runs on STMicroelectronics STM3210B-EVAL, STM3210E-EVAL, STM32L152-EVAL,STM32F303C_EVAL +,STM32F373C_EVAL and STM32L152D-EVAL evaluation boards and can be easily tailored to any other hardware. +To select the STMicroelectronics evaluation board used to run the example, uncomment +the corresponding line in platform_config.h file. + + + STM3210B-EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PC.06, PC.07, PC.08 + and PC.09 pins + + + STM3210E-EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PF.06, PF.07, PF.08 + and PF.09 pins + + + STM32L152-EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PD.00, PD.01, PD.02 + and PC.12 pins + + + STM32L152D-EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PD.03, PD.07, PG.14 + and PG.15 pins + + + STM32F373C_EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PC.0, PC.01, PC.02 + and PC.03 pins + + + STM32F303C_EVAL + - Use LD1, LD2, LD3 and LD4 leds connected respectively to PE.08, PE.09, PE.10 + and PE.11 pins + +How to use it +============= +In order to load the SysTick example with the DFU, you must do the following: + + + EWARM + - Open the SysTick.eww workspace + - In the workspace toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152-EVAL: to configure the project for STM32 Low Power Medium-density devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all + - Go to "Utilities\Binary" and run "hextobin.bat" + - A binary file "SysTick.bin" will be generated under "STM3210E-EVAL\Exe" or + "STM3210B-EVAL\Exe" or "STM32L152-EVAL\Exe" or "STM32L152D-EVAL\Exe" or "STM32373C-EVAL\Exe" or "STM32373C-EVAL\Exe" folder depending + on configuration you selected. + + + MDK-ARM + - Open the SysTick.Uv2 project + - In the build toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Low Power Medium-density devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all target files + - Go to "Utilities\Binary" and run "axftobin.bat" + - A binary file "STM3210B-EVAL_SysTick.bin" or "STM3210E-EVAL_SysTick.bin" + or "STM32L152-EVAL_SysTick.bin" or "STM32L152D-EVAL_SysTick.bin" or "STM32373C-EVAL_SysTick.bin" + or "STM32303C-EVAL_SysTick.bin" will be generated under "\Obj" folder. + + + RIDE + - Open the SysTick.rprj project + - In the configuration toolbar(Project->properties) select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->build project + - Go to "Utilities\Binary" and run "hextobin.bat" + - A binary file "SysTick.bin" will be generated under "\STM3210E_EVAL" + or "\STM3210B_EVAL" or "\STM32L152D_EVAL" or "\STM32L152_EVAL" or "\STM32373C-EVAL" + or "\STM32303C-EVAL" folder depending on configuration you selected. + + + TASKING + - Open TASKING toolchain. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to TASKING workspace directory and select the project: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + + + + TrueSTUDIO + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210B-EVAL: to load the project for STM32 Medium-density devices + - STM3210E-EVAL: to load the project for STM32 High-density devices + - STM3210E_EVAL_XL: to load the project for STM32 XL-density devices + - STM32L152_EVAL: to load the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click + on Project->build project menu. + - Go to "Utilities\Binary" directory and run "TrueSTUDIO_elf2bin.bat" + - A binary file "STM32F10X_XL_SysTick.bin", + "STM3210B-EVAL_SysTick.bin", "STM3210E-EVAL_SysTick.bin", + "STM32L152-EVAL_SysTick.bin" will be generated under "\Debug" folder + "STM32L152D-EVAL_SysTick.bin" will be generated under "\Debug" folder + "STM32373C-EVAL_SysTick.bin" will be generated under "\Debug" folder + "STM32303C-EVAL_SysTick.bin" will be generated under "\Debug" folder + + + The generated .bin file should be converted to the DFU format using the “DFU File + Manager Tool” included in the “DfuSe” PC software install. For more details on + how to convert a .bin file to DFU format please refer to the UM0412 user manual + “Getting started with DfuSe USB device firmware upgrade STMicroelectronics extension” + available from the STMicroelectronics microcontroller website www.st.com. + +************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****** diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/main.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/main.c new file mode 100644 index 0000000..c54fe66 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/main.c @@ -0,0 +1,161 @@ +/** + ****************************************************************************** + * @file main.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Main program body. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +static __IO uint32_t TimingDelay; + +/* Private function prototypes -----------------------------------------------*/ +void NVIC_Configuration(void); +void Delay(__IO uint32_t nTime); + +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : main +* Description : Main program. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32xxx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32xxx.c file + */ + + /* Configure the LEDs */ + STM_EVAL_LEDInit(LED1); + STM_EVAL_LEDInit(LED2); + STM_EVAL_LEDInit(LED3); + STM_EVAL_LEDInit(LED4); + + /* NVIC configuration */ + NVIC_Configuration(); + + /* Setup SysTick Timer for 1 msec interrupts */ + if (SysTick_Config(SystemCoreClock / 1000)) + { + /* Capture error */ + while (1); + } + + while (1) + { + /* Toggle all leds */ + STM_EVAL_LEDToggle(LED1); + STM_EVAL_LEDToggle(LED2); + STM_EVAL_LEDToggle(LED3); + STM_EVAL_LEDToggle(LED4); + + /* Insert 500 ms delay */ + Delay(500); + + /* Toggle all leds */ + STM_EVAL_LEDToggle(LED1); + STM_EVAL_LEDToggle(LED2); + STM_EVAL_LEDToggle(LED3); + STM_EVAL_LEDToggle(LED4); + + /* Insert 300 ms delay */ + Delay(300); + } +} + +/******************************************************************************* +* Function Name : NVIC_Configuration +* Description : Configures Vector Table base location. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void NVIC_Configuration(void) +{ + /* Set the Vector Table base location at 0x3000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x3000); +} +/******************************************************************************* +* Function Name : Delay +* Description : Inserts a delay time. +* Input : nTime: specifies the delay time length, in milliseconds. +* Output : None +* Return : None +*******************************************************************************/ +void Delay(uint32_t nTime) +{ + TimingDelay = nTime; + + while(TimingDelay != 0); +} + +/******************************************************************************* +* Function Name : TimingDelay_Decrement +* Description : Decrements the TimingDelay variable. +* Input : None +* Output : TimingDelay +* Return : None +*******************************************************************************/ +void TimingDelay_Decrement(void) +{ + if (TimingDelay != 0x00) + { + TimingDelay--; + } +} + +#ifdef USE_FULL_ASSERT +/******************************************************************************* +* Function Name : assert_failed +* Description : Reports the name of the source file and the source line number +* where the assert_param error has occurred. +* Input : - file: pointer to the source file name +* - line: assert_param error line source number +* Output : None +* Return : None +*******************************************************************************/ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + { + } +} +#endif + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c new file mode 100644 index 0000000..5af97aa --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c @@ -0,0 +1,1100 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#ifndef STM32F10X_CL + RCC->CFGR &= (uint32_t)0xF8FF0000; +#else + RCC->CFGR &= (uint32_t)0xF0FF0000; +#endif /* STM32F10X_CL */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#ifdef STM32F10X_CL + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= (uint32_t)0xEBFFFFFF; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#ifdef STM32F10X_CL + uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0; +#endif /* STM32F10X_CL */ + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#ifndef STM32F10X_CL + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18; + + if (pllmull != 0x0D) + { + pllmull += 2; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13 / 2; + } + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + + if (prediv1source == 0) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F10X_CL */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + +#ifndef STM32F10X_CL + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#else + if (HSE_VALUE <= 24000000) + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; + } + else + { + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + } +#endif /* STM32F10X_CL */ +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); + + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } +#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); + + /*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + +#else + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL7); +#else + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + +#ifdef STM32F10X_CL + /* Configure PLLs ------------------------------------------------------*/ + /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */ + /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */ + + RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL | + RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC); + RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 | + RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5); + + /* Enable PLL2 */ + RCC->CR |= RCC_CR_PLL2ON; + /* Wait till PLL2 is ready */ + while((RCC->CR & RCC_CR_PLL2RDY) == 0) + { + } + + + /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | + RCC_CFGR_PLLMULL9); +#else + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); +#endif /* STM32F10X_CL */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f37x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f37x.c new file mode 100644 index 0000000..943f188 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f37x.c @@ -0,0 +1,380 @@ +/** + ****************************************************************************** + * @file system_stm32f37x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F37x devices, + * and is generated by the clock configuration tool + * STM32f37x_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f37x.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f37x.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" defined + * in "stm32f37x.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F37x device + *============================================================================= + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 8000000 + *---------------------------------------------------------------------------- + * PLLMUL | 9 + *----------------------------------------------------------------------------- + * PREDIV | 1 + *----------------------------------------------------------------------------- + * USB Clock | ENABLE + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 2 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup STM32F37x_System + * @{ + */ + +/** @addtogroup STM32F37x_System_Private_Includes + * @{ + */ + +#include "stm32f37x.h" + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 72000000; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontrollers system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, SDADCPRE and MCOSEL[2:0] bits */ + RCC->CFGR &= (uint32_t)0x00FF0000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW and CECSW bits */ + RCC->CFGR3 &= (uint32_t)0xFFF0F8C; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK / 2 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32l1xx.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32l1xx.c new file mode 100644 index 0000000..1be659d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32l1xx.c @@ -0,0 +1,533 @@ +/** + ****************************************************************************** + * @file system_stm32l1xx.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32L1xx Ultra + * Low Power devices, and is generated by the clock configuration + * tool "STM32L1xx_Clock_Configuration_V1.1.0.xls". + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and MSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32l1xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * System Clock Configuration + *============================================================================= + * System Clock source | PLL(HSE) + *----------------------------------------------------------------------------- + * SYSCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * HCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * HSE Frequency | 8000000 Hz + *----------------------------------------------------------------------------- + * PLL DIV | 3 + *----------------------------------------------------------------------------- + * PLL MUL | 12 + *----------------------------------------------------------------------------- + * VDD | 3.3 V + *----------------------------------------------------------------------------- + * Vcore | 1.8 V (Range 1) + *----------------------------------------------------------------------------- + * Flash Latency | 1 WS + *----------------------------------------------------------------------------- + * SDIO clock (SDIOCLK) | 48000000 Hz + *----------------------------------------------------------------------------- + * Require 48MHz for USB clock | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l1xx_system + * @{ + */ + +/** @addtogroup STM32L1xx_System_Private_Includes + * @{ + */ + +#include "stm32l1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM32L152D_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 32000000; +__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /*!< Set MSION bit */ + RCC->CR |= (uint32_t)0x00000100; + + /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ + RCC->CFGR &= (uint32_t)0x88FFC00C; + + /*!< Reset HSION, HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xEEFEFFFE; + + /*!< Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ + RCC->CFGR &= (uint32_t)0xFF02FFFF; + + /*!< Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI + * value as defined by the MSI range. + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + case 0x04: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x08: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x0C: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; + pllmul = PLLMulTable[(pllmul >> 18)]; + plldiv = (plldiv >> 22) + 1; + + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + if (pllsource == 0x00) + { + /* HSI oscillator clock selected as PLL clock entry */ + SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); + } + else + { + /* HSE selected as PLL clock entry */ + SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); + } + break; + default: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable 64-bit access */ + FLASH->ACR |= FLASH_ACR_ACC64; + + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTEN; + + /* Flash 1 wait state */ + FLASH->ACR |= FLASH_ACR_LATENCY; + + /* Power enable */ + RCC->APB1ENR |= RCC_APB1ENR_PWREN; + + /* Select the Voltage Range 1 (1.8 V) */ + PWR->CR = PWR_CR_VOS_0; + + /* Wait Until the Voltage Regulator is ready */ + while((PWR->CSR & PWR_CSR_VOSF) != RESET) + { + } + + /* HCLK = SYSCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | + RCC_CFGR_PLLDIV)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLDIV3); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in SystemInit() function before jump to main. + * This function configures the external SRAM mounted on STM32L152D_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+ + | PD15 <-> FSMC_D1 |--------------------+ + +-------------------+ +*/ + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHBENR = 0x000080D8; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00CC00CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A0A; + /* Configure PDx pins speed to 40 MHz */ + GPIOD->OSPEEDR = 0xFFFF0F0F; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 40 MHz */ + GPIOE->OSPEEDR = 0xFFFFC00F; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 40 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x00000C00; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00200AAA; + /* Configure PGx pins speed to 40 MHz */ + GPIOG->OSPEEDR = 0x00300FFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHBENR = 0x400080D8; + + /* Configure and enable Bank1_SRAM3 */ + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000300; + FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; +/* + Bank1_SRAM3 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 3; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/dfu_mal.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/dfu_mal.h new file mode 100644 index 0000000..9ac6c57 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/dfu_mal.h @@ -0,0 +1,74 @@ +/** + ****************************************************************************** + * @file dfu_mal.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for dfu_mal.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __DFU_MAL_H +#define __DFU_MAL_H + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" +#include "dfu_mal.h" +#include "usb_desc.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +#define MAL_OK 0 +#define MAL_FAIL 1 +#define MAX_USED_MEDIA 3 +#define MAL_MASK 0xFC000000 + +#define INTERNAL_FLASH_BASE 0x08000000 +#define SPI_FLASH_BASE 0x00000000 +#define NOR_FLASH_BASE 0x64000000 + +#define NOR_M29W128F 0x2212 +#define NOR_M29W128G 0x2221 +#define NOR_S29GL128 0x2221 + +/* utils macro ---------------------------------------------------------------*/ +#define _1st_BYTE(x) (uint8_t)((x)&0xFF) /* 1st addressing cycle */ +#define _2nd_BYTE(x) (uint8_t)(((x)&0xFF00)>>8) /* 2nd addressing cycle */ +#define _3rd_BYTE(x) (uint8_t)(((x)&0xFF0000)>>16) /* 3rd addressing cycle */ +#define _4th_BYTE(x) (uint8_t)(((x)&0xFF000000)>>24) /* 4th addressing cycle */ +/* Exported macro ------------------------------------------------------------*/ +#define SET_POLLING_TIMING(x) buffer[1] = _1st_BYTE(x);\ + buffer[2] = _2nd_BYTE(x);\ + buffer[3] = _3rd_BYTE(x); + +/* Exported functions ------------------------------------------------------- */ + +uint16_t MAL_Init (void); +uint16_t MAL_Erase (uint32_t SectorAddress); +uint16_t MAL_Write (uint32_t SectorAddress, uint32_t DataLength); +uint8_t *MAL_Read (uint32_t SectorAddress, uint32_t DataLength); +uint16_t MAL_GetStatus(uint32_t SectorAddress ,uint8_t Cmd, uint8_t *buffer); + +extern uint8_t MAL_Buffer[wTransferSize]; /* RAM Buffer for Downloaded Data */ +#endif /* __DFU_MAL_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/flash_if.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/flash_if.h new file mode 100644 index 0000000..14e5556 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/flash_if.h @@ -0,0 +1,48 @@ +/** + ****************************************************************************** + * @file flash_if.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for flash_if.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __FLASH_IF_MAL_H +#define __FLASH_IF_MAL_H + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +uint16_t FLASH_If_Init(void); +uint16_t FLASH_If_Erase (uint32_t SectorAddress); +uint16_t FLASH_If_Write(uint32_t SectorAddress, uint32_t DataLength); +uint8_t *FLASH_If_Read (uint32_t SectorAddress, uint32_t DataLength); + +#endif /* __FLASH_IF_MAL_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/fsmc_nor.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/fsmc_nor.h new file mode 100644 index 0000000..61b5725 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/fsmc_nor.h @@ -0,0 +1,71 @@ +/** + ****************************************************************************** + * @file fsmc_nor.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for fsmc_nor.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __FSMC_NOR_H +#define __FSMC_NOR_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +typedef struct +{ + uint16_t Manufacturer_Code; + uint16_t Device_Code1; + uint16_t Device_Code2; + uint16_t Device_Code3; +}NOR_IDTypeDef; + +/* NOR Status */ +typedef enum +{ + NOR_SUCCESS = 0, + NOR_ONGOING, + NOR_ERROR, + NOR_TIMEOUT +}NOR_Status; + +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void FSMC_NOR_Init(void); +void FSMC_NOR_ReadID(NOR_IDTypeDef* NOR_ID); +NOR_Status FSMC_NOR_EraseBlock(uint32_t BlockAddr); +NOR_Status FSMC_NOR_EraseChip(void); +NOR_Status FSMC_NOR_WriteHalfWord(uint32_t WriteAddr, uint16_t Data); +NOR_Status FSMC_NOR_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite); +NOR_Status FSMC_NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite); +uint16_t FSMC_NOR_ReadHalfWord(uint32_t ReadAddr); +void FSMC_NOR_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead); +NOR_Status FSMC_NOR_ReturnToReadMode(void); +NOR_Status FSMC_NOR_Reset(void); +NOR_Status FSMC_NOR_GetStatus(uint32_t Timeout); + +#endif /* __FSMC_NOR_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/nor_if.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/nor_if.h new file mode 100644 index 0000000..23ebcaf --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/nor_if.h @@ -0,0 +1,47 @@ +/** + ****************************************************************************** + * @file nor_if.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for nor_if.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __NOR_IF_MAL_H +#define __NOR_IF_MAL_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +uint16_t NOR_If_Init(void); +uint16_t NOR_If_Erase(uint32_t Address); +uint16_t NOR_If_Write(uint32_t Address, uint32_t DataLength); +uint8_t *NOR_If_Read(uint32_t Address, uint32_t DataLength); + +#endif /* __NOR_IF_MAL_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/platform_config.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/platform_config.h new file mode 100644 index 0000000..d501b0f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/platform_config.h @@ -0,0 +1,160 @@ +/** + ****************************************************************************** + * @file platform_config.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Evaluation board specific configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __PLATFORM_CONFIG_H +#define __PLATFORM_CONFIG_H + +/* Includes ------------------------------------------------------------------*/ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + #include "stm32l1xx.h" + #if defined (USE_STM32L152_EVAL) + #include "stm32l152_eval.h" + #elif defined (USE_STM32L152D_EVAL) + #include "stm32l152d_eval.h" + #else + #error "Missing define: USE_STM32L152_EVAL or USE_STM32L152D_EVAL" + #endif /* USE_STM32L152_EVAL */ +#elif defined (STM32F10X_MD) || defined (STM32F10X_HD) || defined (STM32F10X_XL) + #include "stm32f10x.h" + #include "spi_if.h" + #include "nor_if.h" + #include "fsmc_nor.h" + #if defined (USE_STM3210B_EVAL) + #include "stm3210b_eval.h" + #include "stm3210b_eval_spi_flash.h" + #elif defined (USE_STM3210E_EVAL) + #include "stm3210e_eval.h" + #include "stm3210e_eval_spi_flash.h" + #else + #error "Missing define: USE_STM3210B_EVAL or USE_STM3210E_EVAL" + #endif /* USE_STM3210B_EVAL */ +#elif defined (USE_STM32373C_EVAL) + #include "stm32f37x.h" + #include "stm32373c_eval.h" +#elif defined (USE_STM32303C_EVAL) + #include "stm32f30x.h" + #include "stm32303c_eval.h" +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line corresponding to the STMicroelectronics evaluation board + used to run the example */ +#if !defined (USE_STM3210B_EVAL) && !defined (USE_STM3210E_EVAL) && !defined (USE_STM32L152_EVAL) && !defined (USE_STM32L152D_EVAL)&& !defined (USE_STM32373C_EVAL) && !defined (USE_STM32303C_EVAL) +//#define USE_STM3210B_EVAL +//#define USE_STM3210E_EVAL +//#define USE_STM32L152_EVAL +//#define USE_STM32L152D_EVAL +//#define USE_STM32373C_EVAL +#define USE_STM32303C_EVAL +#endif + +/*Unique Devices IDs register set*/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD) || defined(STM32L1XX_MD_PLUS) + +#define ID1 (0x1FF80050) +#define ID2 (0x1FF80054) +#define ID3 (0x1FF80064) + +#elif defined (STM32F37X) || defined(STM32F30X) + +#define ID1 (0x1FFFF7AC) +#define ID2 (0x1FFFF7B0) +#define ID3 (0x1FFFF7B4) + +#else /*STM32F1x*/ + +#define ID1 (0x1FFFF7E8) +#define ID2 (0x1FFFF7EC) +#define ID3 (0x1FFFF7F0) + +#endif + +/* Define the STM32F10x hardware depending on the used evaluation board */ +#ifdef USE_STM3210B_EVAL + #define USB_DISCONNECT GPIOD + #define USB_DISCONNECT_PIN GPIO_Pin_9 + #define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOD + +#elif defined (USE_STM3210E_EVAL) + #define USB_DISCONNECT GPIOB + #define USB_DISCONNECT_PIN GPIO_Pin_14 + #define RCC_APB2Periph_GPIO_DISCONNECT RCC_APB2Periph_GPIOB + +#elif defined (USE_STM32L152_EVAL) || defined (USE_STM32L152D_EVAL) + /* + For STM32L15xx devices it is possible to use the internal USB pullup + controlled by register SYSCFG_PMC (refer to RM0038 reference manual for + more details). + It is also possible to use external pullup (and disable the internal pullup) + by setting the define USB_USE_EXTERNAL_PULLUP in file platform_config.h + and configuring the right pin to be used for the external pull up configuration. + To have more details on how to use an external pull up, please refer to + STM3210E-EVAL evaluation board manuals. + */ + /* Uncomment the following define to use an external pull up instead of the + integrated STM32L15xx internal pull up. In this case make sure to set up + correctly the external required hardware and the GPIO defines below.*/ +/* #define USB_USE_EXTERNAL_PULLUP */ + + #if !defined(USB_USE_EXTERNAL_PULLUP) + #define STM32L15_USB_CONNECT SYSCFG_USBPuCmd(ENABLE) + #define STM32L15_USB_DISCONNECT SYSCFG_USBPuCmd(DISABLE) + + #elif defined(USB_USE_EXTERNAL_PULLUP) + /* PA0 is chosen just as illustrating example, you should modify the defines + below according to your hardware configuration. */ + #define USB_DISCONNECT GPIOA + #define USB_DISCONNECT_PIN GPIO_Pin_0 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOA + #define STM32L15_USB_CONNECT GPIO_ResetBits(USB_DISCONNECT, USB_DISCONNECT_PIN) + #define STM32L15_USB_DISCONNECT GPIO_SetBits(USB_DISCONNECT, USB_DISCONNECT_PIN) + #endif /* USB_USE_EXTERNAL_PULLUP */ + +#elif defined (USE_STM32373C_EVAL) + #define USB_DISCONNECT GPIOC + #define USB_DISCONNECT_PIN GPIO_Pin_5 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOC + #define GPIO_KEY_EXTI_Line EXTI_Line18 + +#elif defined (USE_STM32303C_EVAL) + #define USB_DISCONNECT GPIOB + #define USB_DISCONNECT_PIN GPIO_Pin_8 + #define RCC_AHBPeriph_GPIO_DISCONNECT RCC_AHBPeriph_GPIOB + #define GPIO_KEY_EXTI_Line EXTI_Line18 + +#endif /* USE_STM3210B_EVAL */ + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +#endif /* __PLATFORM_CONFIG_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32_it.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32_it.h new file mode 100644 index 0000000..f139828 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32_it.h @@ -0,0 +1,55 @@ +/** + ****************************************************************************** + * @file stm32_it.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_IT_H +#define __STM32_IT_H + +/* Includes ------------------------------------------------------------------*/ +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void USB_LP_CAN1_RX0_IRQHandler(void); + +#endif /* __STM32_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f10x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f10x_conf.h new file mode 100644 index 0000000..e08299d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f10x_conf.h @@ -0,0 +1,85 @@ +/** + ****************************************************************************** + * @file stm32f10x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment the line below to enable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/******************************************************************************* +* Macro Name : assert_param +* Description : The assert_param macro is used for function's parameters check. +* Input : - expr: If expr is false, it calls assert_failed function +* which reports the name of the source file and the source +* line number of the call that failed. +* If expr is true, it returns no value. +* Return : None +*******************************************************************************/ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f30x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f30x_conf.h new file mode 100644 index 0000000..e716105 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f30x_conf.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file stm32f30x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F30X_CONF_H +#define __STM32F30X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f30x_adc.h" +#include "stm32f30x_can.h" +#include "stm32f30x_crc.h" +#include "stm32f30x_comp.h" +#include "stm32f30x_dac.h" +#include "stm32f30x_dbgmcu.h" +#include "stm32f30x_dma.h" +#include "stm32f30x_exti.h" +#include "stm32f30x_flash.h" +#include "stm32f30x_gpio.h" +#include "stm32f30x_syscfg.h" +#include "stm32f30x_i2c.h" +#include "stm32f30x_iwdg.h" +#include "stm32f30x_opamp.h" +#include "stm32f30x_pwr.h" +#include "stm32f30x_rcc.h" +#include "stm32f30x_rtc.h" +#include "stm32f30x_spi.h" +#include "stm32f30x_tim.h" +#include "stm32f30x_usart.h" +#include "stm32f30x_wwdg.h" +#include "stm32f30x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F30X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f37x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f37x_conf.h new file mode 100644 index 0000000..3d39101 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32f37x_conf.h @@ -0,0 +1,83 @@ +/** + ****************************************************************************** + * @file stm32f37x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F37X_CONF_H +#define __STM32F37X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f37x_adc.h" +#include "stm32f37x_can.h" +#include "stm32f37x_cec.h" +#include "stm32f37x_crc.h" +#include "stm32f37x_comp.h" +#include "stm32f37x_dac.h" +#include "stm32f37x_dbgmcu.h" +#include "stm32f37x_dma.h" +#include "stm32f37x_exti.h" +#include "stm32f37x_flash.h" +#include "stm32f37x_gpio.h" +#include "stm32f37x_syscfg.h" +#include "stm32f37x_i2c.h" +#include "stm32f37x_iwdg.h" +#include "stm32f37x_pwr.h" +#include "stm32f37x_rcc.h" +#include "stm32f37x_rtc.h" +#include "stm32f37x_sdadc.h" +#include "stm32f37x_spi.h" +#include "stm32f37x_tim.h" +#include "stm32f37x_usart.h" +#include "stm32f37x_wwdg.h" +#include "stm32f37x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F37X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32l1xx_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32l1xx_conf.h new file mode 100644 index 0000000..ae4a251 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/stm32l1xx_conf.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file stm32l1xx_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L1xx_CONF_H +#define __STM32L1xx_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment the line below to enable peripheral header file inclusion */ +#include "stm32l1xx_adc.h" +#include "stm32l1xx_crc.h" +#include "stm32l1xx_comp.h" +#include "stm32l1xx_dac.h" +#include "stm32l1xx_dbgmcu.h" +#include "stm32l1xx_dma.h" +#include "stm32l1xx_exti.h" +#include "stm32l1xx_flash.h" +#include "stm32l1xx_gpio.h" +#include "stm32l1xx_syscfg.h" +#include "stm32l1xx_i2c.h" +#include "stm32l1xx_iwdg.h" +#include "stm32l1xx_lcd.h" +#include "stm32l1xx_pwr.h" +#include "stm32l1xx_rcc.h" +#include "stm32l1xx_rtc.h" +#include "stm32l1xx_spi.h" +#include "stm32l1xx_tim.h" +#include "stm32l1xx_usart.h" +#include "stm32l1xx_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval : None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32L1xx_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_desc.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_desc.h new file mode 100644 index 0000000..53ff670 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_desc.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file usb_desc.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Descriptor Header for Device Firmware Upgrade (DFU) + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_DESC_H +#define __USB_DESC_H +#include "platform_config.h" + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +#define DFU_SIZ_DEVICE_DESC 18 + +#ifdef USE_STM3210B_EVAL + #define DFU_SIZ_CONFIG_DESC 36 +#elif defined(USE_STM3210E_EVAL) + #define DFU_SIZ_CONFIG_DESC 45 +#elif defined(USE_STM32L152_EVAL) || defined (USE_STM32L152D_EVAL) || defined(USE_STM32373C_EVAL) || defined(USE_STM32303C_EVAL) + #define DFU_SIZ_CONFIG_DESC 27 +#endif /* USE_STM3210B_EVAL */ + +#define DFU_SIZ_STRING_LANGID 4 +#define DFU_SIZ_STRING_VENDOR 38 +#define DFU_SIZ_STRING_PRODUCT 20 +#define DFU_SIZ_STRING_SERIAL 26 +#define DFU_SIZ_STRING_INTERFACE0 98 /* Flash Bank 0 */ + +#define DFU_SIZ_STRING_INTERFACE1 98 /* SPI Flash : M25P64*/ +#define DFU_SIZ_STRING_INTERFACE2 106 /* NOR Flash : M26M128*/ + +extern uint8_t DFU_DeviceDescriptor[DFU_SIZ_DEVICE_DESC]; +extern uint8_t DFU_ConfigDescriptor[DFU_SIZ_CONFIG_DESC]; +extern uint8_t DFU_StringLangId [DFU_SIZ_STRING_LANGID]; +extern uint8_t DFU_StringVendor [DFU_SIZ_STRING_VENDOR]; +extern uint8_t DFU_StringProduct [DFU_SIZ_STRING_PRODUCT]; +extern uint8_t DFU_StringSerial [DFU_SIZ_STRING_SERIAL]; +extern uint8_t DFU_StringInterface0 [DFU_SIZ_STRING_INTERFACE0]; +extern uint8_t DFU_StringInterface1 [DFU_SIZ_STRING_INTERFACE1]; +extern uint8_t DFU_StringInterface2_1 [DFU_SIZ_STRING_INTERFACE2]; +extern uint8_t DFU_StringInterface2_2 [DFU_SIZ_STRING_INTERFACE2]; +extern uint8_t DFU_StringInterface2_3 [DFU_SIZ_STRING_INTERFACE2]; + +#define bMaxPacketSize0 0x40 /* bMaxPacketSize0 = 64 bytes */ + +#define wTransferSize 0x0400 /* wTransferSize = 1024 bytes */ +/* bMaxPacketSize0 <= wTransferSize <= 32kbytes */ +#define wTransferSizeB0 0x00 +#define wTransferSizeB1 0x04 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +/* External variables --------------------------------------------------------*/ + +#endif /* __USB_DESC_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_prop.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_prop.h new file mode 100644 index 0000000..ec8b2a3 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_prop.h @@ -0,0 +1,141 @@ +/** + ****************************************************************************** + * @file usb_prop.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processing related to DFU demo + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_PROP_H +#define __USB_PROP_H + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void DFU_init(void); +void DFU_Reset(void); +void DFU_SetConfiguration(void); +void DFU_SetDeviceAddress (void); +void DFU_Status_In (void); +void DFU_Status_Out (void); +RESULT DFU_Data_Setup(uint8_t); +RESULT DFU_NoData_Setup(uint8_t); +RESULT DFU_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting); +uint8_t *DFU_GetDeviceDescriptor(uint16_t ); +uint8_t *DFU_GetConfigDescriptor(uint16_t); +uint8_t *DFU_GetStringDescriptor(uint16_t); +uint8_t *UPLOAD(uint16_t Length); +uint8_t *DNLOAD(uint16_t Length); +uint8_t *GETSTATE(uint16_t Length); +uint8_t *GETSTATUS(uint16_t Length); +void DFU_write_crc (void); + +/* External variables --------------------------------------------------------*/ + +#define DFU_GetConfiguration NOP_Process +//#define DFU_SetConfiguration NOP_Process +#define DFU_GetInterface NOP_Process +#define DFU_SetInterface NOP_Process +#define DFU_GetStatus NOP_Process +#define DFU_ClearFeature NOP_Process +#define DFU_SetEndPointFeature NOP_Process +#define DFU_SetDeviceFeature NOP_Process +//#define DFU_SetDeviceAddress NOP_Process + +/*---------------------------------------------------------------------*/ +/* DFU definitions */ +/*---------------------------------------------------------------------*/ + +/**************************************************/ +/* DFU Requests */ +/**************************************************/ + +typedef enum _DFU_REQUESTS { + DFU_DNLOAD = 1, + DFU_UPLOAD, + DFU_GETSTATUS, + DFU_CLRSTATUS, + DFU_GETSTATE, + DFU_ABORT +} DFU_REQUESTS; + +/**************************************************/ +/* DFU Requests DFU states */ +/**************************************************/ + + +#define STATE_appIDLE 0 +#define STATE_appDETACH 1 +#define STATE_dfuIDLE 2 +#define STATE_dfuDNLOAD_SYNC 3 +#define STATE_dfuDNBUSY 4 +#define STATE_dfuDNLOAD_IDLE 5 +#define STATE_dfuMANIFEST_SYNC 6 +#define STATE_dfuMANIFEST 7 +#define STATE_dfuMANIFEST_WAIT_RESET 8 +#define STATE_dfuUPLOAD_IDLE 9 +#define STATE_dfuERROR 10 + +/**************************************************/ +/* DFU Requests DFU status */ +/**************************************************/ + +#define STATUS_OK 0x00 +#define STATUS_ERRTARGET 0x01 +#define STATUS_ERRFILE 0x02 +#define STATUS_ERRWRITE 0x03 +#define STATUS_ERRERASE 0x04 +#define STATUS_ERRCHECK_ERASED 0x05 +#define STATUS_ERRPROG 0x06 +#define STATUS_ERRVERIFY 0x07 +#define STATUS_ERRADDRESS 0x08 +#define STATUS_ERRNOTDONE 0x09 +#define STATUS_ERRFIRMWARE 0x0A +#define STATUS_ERRVENDOR 0x0B +#define STATUS_ERRUSBR 0x0C +#define STATUS_ERRPOR 0x0D +#define STATUS_ERRUNKNOWN 0x0E +#define STATUS_ERRSTALLEDPKT 0x0F + +/**************************************************/ +/* DFU Requests DFU states Manifestation State */ +/**************************************************/ + +#define Manifest_complete 0x00 +#define Manifest_In_Progress 0x01 + + +/**************************************************/ +/* Special Commands with Download Request */ +/**************************************************/ + +#define CMD_GETCOMMANDS 0x00 +#define CMD_SETADDRESSPOINTER 0x21 +#define CMD_ERASE 0x41 + +#endif /* __USB_PROP_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_pwr.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_pwr.h new file mode 100644 index 0000000..3f56f16 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_pwr.h @@ -0,0 +1,68 @@ +/** + ****************************************************************************** + * @file usb_pwr.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Connection/disconnection & power management header + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_PWR_H +#define __USB_PWR_H +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +typedef enum _RESUME_STATE +{ + RESUME_EXTERNAL, + RESUME_INTERNAL, + RESUME_LATER, + RESUME_WAIT, + RESUME_START, + RESUME_ON, + RESUME_OFF, + RESUME_ESOF +} RESUME_STATE; + +typedef enum _DEVICE_STATE +{ + UNCONNECTED, + ATTACHED, + POWERED, + SUSPENDED, + ADDRESSED, + CONFIGURED +} DEVICE_STATE; +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void Suspend(void); +void Resume_Init(void); +void Resume(RESUME_STATE eResumeSetVal); +RESULT PowerOn(void); +RESULT PowerOff(void); +/* External variables --------------------------------------------------------*/ +extern __IO uint32_t bDeviceState; /* USB device status */ +extern __IO bool fSuspendEnabled; /* true when suspend is possible */ + +#endif /*__USB_PWR_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/readme.txt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/readme.txt new file mode 100644 index 0000000..25ca5c0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/readme.txt @@ -0,0 +1,173 @@ +/** + ****************************************************************************** + * @file readme.txt + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Description of the USB Device_Firmware_Upgrade Demo. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +Example description +=================== +This Demo presents the implementation of a device firmware upgrade (DFU) capability +in the STM32F10xxx, STM32F37xxx, STM32F30xxx and STM32L15xxx microcontrollers. It follows the DFU class +specification defined by the USB Implementers Forum for reprogramming an application +through USB-FS-Device. +The DFU principle is particularly well suited to USB-FS-Device applications that +need to be reprogrammed in the field. + +More details about this Demo implementation is given in the User manual +"UM0424 STM32F10xxx USB development kit", available for download from the ST +microcontrollers website: www.st.com/stm32 + + +Directory contents +================== + + \binary_template: contains a set of sources files that build the application + to be loaded with DFU + + \inc: contains the Demo firmware header files + + \EWARM: contains preconfigured project for EWARM toolchain + + \RIDE: contains preconfigured project for RIDE toolchain + + \MDK-ARM: contains preconfigured project for MDK-ARM toolchain + + \TASKING: contains preconfigured project for TASKING toolchain + + \TrueSTUDIO: contains preconfigured projects for TrueSTUDIO toolchain + + \src: contains the Demo firmware source files + + +Hardware environment +==================== +This example runs these STMicroelectronics evaluation boards and can be easily tailored to any other hardware: + +- STM3210B-EVAL +- STM3210E-EVAL +- STM32L152-EVAL +- STM32F373C_EVAL +- STM32F303C_EVAL +- STM32L152D-EVAL + +To select the STMicroelectronics evaluation board used to run the example, uncomment +the corresponding line in platform_config.h file. + +Note: After each device reset, hold down the Key push-button on the STM3210B-EVAL + or STM3210E-EVAL or STM32L152D-EVAL or STM32F373C-EVAL evaluation boards or the Up push button + on STM32L152-EVAL evaluation board to enter the DFU mode. + + - STM3210B-EVAL Set-up + - Jumper JP1 (USB disconnect) should be connected in position 2-3. + + - STM3210E-EVAL Set-up + - Jumper JP14 (USB disconnect) should be connected in position 2-3. + + - STM32L152-EVAL Set-up + - None. + - Note that the JoyStick Up push button is used to enter DFU mode. + + - STM32L152D-EVAL Set-up + - None. + + - STM32F373C-EVAL Set-up + - None. + + - STM32F303C-EVAL Set-up + - None. + +How to use it +============= + + EWARM + - Open the DFU.eww workspace. + - In the workspace toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all + - Load project image: Project->Debug + - Run program: Debug->Go(F5) + + + MDK-ARM + - Open the DFU.Uv2 project + - In the build toolbar select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->Rebuild all target files + - Load project image: Debug->Start/Stop Debug Session + - Run program: Debug->Run (F5) + + + RIDE + - Open the DFU.rprj project. + - In the configuration toolbar(Project->properties) select the project config: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all files: Project->build project + - Load project image: Debug->start(ctrl+D) + - Run program: Debug->Run(ctrl+F9) + + + TASKING + - Open TASKING toolchain. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to TASKING workspace directory and select the project: + - STM3210B-EVAL: to configure the project for STM32 Medium-density devices + - STM3210E-EVAL: to configure the project for STM32 High-density devices + - STM3210E-EVAL_XL: to configure the project for STM32 XL-density devices + - STM32L152-EVAL: to configure the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + + + TrueSTUDIO + - Open the TrueSTUDIO toolchain. + - Click on File->Switch Workspace->Other and browse to TrueSTUDIO workspace + directory. + - Click on File->Import, select General->'Existing Projects into Workspace' + and then click "Next". + - Browse to the TrueSTUDIO workspace directory and select the project: + - STM3210B-EVAL: to load the project for STM32 Medium-density devices + - STM3210E-EVAL: to load the project for STM32 High-density devices + - STM3210E_EVAL_XL: to load the project for STM32 XL-density devices + - STM32L152_EVAL: to load the project for STM32 Medium-Density Low-Power devices + - STM32L152D-EVAL: to configure the project for STM32 High-Density Low-Power devices + - STM32373C-EVAL: to configure the project for STM32F37xxx devices + - STM32303C-EVAL: to configure the project for STM32F30xxx devices + - Rebuild all project files: Select the project in the "Project explorer" + window then click on Project->build project menu. + - Run program: Select the project in the "Project explorer" window then click + Run->Debug (F11) + +************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****** diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/dfu_mal.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/dfu_mal.c new file mode 100644 index 0000000..b0e8366 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/dfu_mal.c @@ -0,0 +1,253 @@ +/** + ****************************************************************************** + * @file dfu_mal.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Generic media access Layer + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "dfu_mal.h" +#include "usb_lib.h" +#include "usb_type.h" +#include "usb_desc.h" +#include "flash_if.h" + +#if !defined(STM32L1XX_MD) && !defined(STM32L1XX_HD) && !defined(STM32L1XX_MD_PLUS)&& !defined (USE_STM32373C_EVAL) && !defined (USE_STM32303C_EVAL) + #include "spi_if.h" + + #include "nor_if.h" + #include "fsmc_nor.h" +#endif /* STM32L1XX_MD && USE_STM32373C_EVAL*/ +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +uint16_t (*pMAL_Init) (void); +uint16_t (*pMAL_Erase) (uint32_t SectorAddress); +uint16_t (*pMAL_Write) (uint32_t SectorAddress, uint32_t DataLength); +uint8_t *(*pMAL_Read) (uint32_t SectorAddress, uint32_t DataLength); +uint8_t MAL_Buffer[wTransferSize]; /* RAM Buffer for Downloaded Data */ + +#if !defined(STM32L1XX_MD) && !defined(STM32L1XX_HD) && !defined(STM32L1XX_MD_PLUS)&& !defined (USE_STM32373C_EVAL) && !defined (USE_STM32303C_EVAL) + NOR_IDTypeDef NOR_ID; +#endif /* STM32L1XX_XD */ + +extern ONE_DESCRIPTOR DFU_String_Descriptor[7]; + +/* This table holds the Typical Sector Erase and 1024 Bytes Write timings. + These timings will be returned to the host when it checks the device + status during a write or erase operation to know how much time the host + should wait before issuing the next get status request. + These defines are set in usb_conf.h file. + The values of this table should be extracted from relative memories + datasheet (Typical or Maximum timming value for Sector Erase and for + 1024 bytes Write). All timings are expressed in millisecond unit (ms). + Note that "Sector" refers here to the memory unit used for Erase/Write + operations. It could be a sector, a page, a block, a word ... + If the erase operation is not supported, it is advised to set the erase + timing to 1 (which means 1ms: one USB frame). */ +static const uint16_t TimingTable[5][2] = + { /* Sector Erase time, Sector Program time*/ + { SPI_FLASH_SECTOR_ERASE_TIME, SPI_FLASH_SECTOR_WRITE_TIME }, /* SPI Flash */ + { M29W128F_SECTOR_ERASE_TIME, M29W128F_SECTOR_WRITE_TIME }, /* NOR Flash M29W128F */ + { INTERN_FLASH_SECTOR_ERASE_TIME, INTERN_FLASH_SECTOR_WRITE_TIME }, /* Internal Flash */ + { M29W128G_SECTOR_ERASE_TIME, M29W128G_SECTOR_WRITE_TIME }, /* NOR Flash M29W128G */ + { S29GL128_SECTOR_ERASE_TIME, S29GL128_SECTOR_WRITE_TIME } /* NOR Flash S29GL128 */ + }; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : MAL_Init +* Description : Initializes the Media on the STM32 +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_Init(void) +{ + + FLASH_If_Init(); /* Internal Flash */ + +#if defined(USE_STM3210B_EVAL) || defined(USE_STM3210E_EVAL) + SPI_If_Init(); /* SPI Flash */ +#endif /* USE_STM3210B_EVAL or USE_STM3210E_EVAL */ + +#ifdef USE_STM3210E_EVAL + NOR_If_Init(); /* NOR Flash */ + FSMC_NOR_ReadID(&NOR_ID); + + FSMC_NOR_ReturnToReadMode(); + + /* select the alternate descriptor following NOR ID */ + if ((NOR_ID.Manufacturer_Code == 0x01)&&(NOR_ID.Device_Code2 == NOR_S29GL128)) + { + DFU_String_Descriptor[6].Descriptor = DFU_StringInterface2_3; + } + + /* select the alternate descriptor following NOR ID */ + if ((NOR_ID.Manufacturer_Code == 0x20)&&(NOR_ID.Device_Code2 == NOR_M29W128G)) + { + DFU_String_Descriptor[6].Descriptor = DFU_StringInterface2_2; + } +#endif /* USE_STM3210E_EVAL */ + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : MAL_Erase +* Description : Erase sector +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_Erase(uint32_t SectorAddress) +{ + + switch (SectorAddress & MAL_MASK) + { + case INTERNAL_FLASH_BASE: + pMAL_Erase = FLASH_If_Erase; + break; + +#if defined(USE_STM3210B_EVAL) || defined(USE_STM3210E_EVAL) + case SPI_FLASH_BASE: + pMAL_Erase = SPI_If_Erase; + break; +#endif /* USE_STM3210B_EVAL or USE_STM3210E_EVAL */ + +#ifdef USE_STM3210E_EVAL + case NOR_FLASH_BASE: + pMAL_Erase = NOR_If_Erase; + break; +#endif /* USE_STM3210E_EVAL */ + + default: + return MAL_FAIL; + } + return pMAL_Erase(SectorAddress); +} + +/******************************************************************************* +* Function Name : MAL_Write +* Description : Write sectors +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t MAL_Write (uint32_t SectorAddress, uint32_t DataLength) +{ + + switch (SectorAddress & MAL_MASK) + { + case INTERNAL_FLASH_BASE: + pMAL_Write = FLASH_If_Write; + break; + +#if defined(USE_STM3210B_EVAL) || defined(USE_STM3210E_EVAL) + case SPI_FLASH_BASE: + pMAL_Write = SPI_If_Write; + break; +#endif /* USE_STM3210B_EVAL || USE_STM3210E_EVAL */ + +#ifdef USE_STM3210E_EVAL + case NOR_FLASH_BASE: + pMAL_Write = NOR_If_Write; + break; +#endif /* USE_STM3210E_EVAL */ + default: + return MAL_FAIL; + } + return pMAL_Write(SectorAddress, DataLength); +} + +/******************************************************************************* +* Function Name : MAL_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : Buffer pointer +*******************************************************************************/ +uint8_t *MAL_Read (uint32_t SectorAddress, uint32_t DataLength) +{ + + switch (SectorAddress & MAL_MASK) + { + case INTERNAL_FLASH_BASE: + pMAL_Read = FLASH_If_Read; + break; + +#if defined(USE_STM3210B_EVAL) || defined(USE_STM3210E_EVAL) + case SPI_FLASH_BASE: + pMAL_Read = SPI_If_Read; + break; +#endif /* USE_STM3210B_EVAL or USE_STM3210E_EVAL */ + +#ifdef USE_STM3210E_EVAL + case NOR_FLASH_BASE: + pMAL_Read = NOR_If_Read; + break; +#endif /* USE_STM3210E_EVAL */ + + default: + return 0; + } + return pMAL_Read (SectorAddress, DataLength); +} + +/******************************************************************************* +* Function Name : MAL_GetStatus +* Description : Get status +* Input : None +* Output : None +* Return : Buffer pointer +*******************************************************************************/ +uint16_t MAL_GetStatus(uint32_t SectorAddress , uint8_t Cmd, uint8_t *buffer) +{ + uint8_t x = (SectorAddress >> 26) & 0x03 ; /* 0x000000000 --> 0 */ + /* 0x640000000 --> 1 */ + /* 0x080000000 --> 2 */ + + uint8_t y = Cmd & 0x01; + +#if defined(USE_STM3210E_EVAL) + if ((x == 1) && (NOR_ID.Device_Code2 == NOR_M29W128G)&& (NOR_ID.Manufacturer_Code == 0x20)) + { + x = 3 ; + } + else if((x == 1) && (NOR_ID.Device_Code2 == NOR_S29GL128) && (NOR_ID.Manufacturer_Code == 0x01)) + { + x = 4 ; + } +#endif /* USE_STM3210E_EVAL */ + + SET_POLLING_TIMING(TimingTable[x][y]); /* x: Erase/Write Timing */ + /* y: Media */ + return MAL_OK; +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/flash_if.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/flash_if.c new file mode 100644 index 0000000..e6caf41 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/flash_if.c @@ -0,0 +1,171 @@ +/** + ****************************************************************************** + * @file flash_if.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief specific media access Layer for internal flash + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "flash_if.h" +#include "dfu_mal.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + uint32_t tHalfPage1[128/4]; + uint32_t tHalfPage2[128/4]; +#endif /* STM32L1XX_XD */ + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : FLASH_If_Init +* Description : Initializes the Media on the STM32 +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t FLASH_If_Init(void) +{ + return MAL_OK; +} + +/******************************************************************************* +* Function Name : FLASH_If_Erase +* Description : Erase sector +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t FLASH_If_Erase(uint32_t SectorAddress) +{ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + FLASH_ClearFlag(FLASH_FLAG_PGAERR | FLASH_FLAG_OPTVERR); + FLASH_ErasePage(SectorAddress); +#else + FLASH_ErasePage(SectorAddress); +#endif /* STM32L1XX_XD */ + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : FLASH_If_Write +* Description : Write sectors +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t FLASH_If_Write(uint32_t SectorAddress, uint32_t DataLength) +{ + uint32_t idx = 0; +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + __IO uint32_t* malPointer = (uint32_t *)MAL_Buffer; + __IO uint32_t* memPointer = (uint32_t *)SectorAddress; + __IO uint32_t memBuffer[32]; /* Temporary buffer holding data that will be written in a half-page space */ + __IO uint32_t* mempBuffer = memBuffer; + __IO uint32_t* tmp; +#endif /* STM32L1XX_XD */ + + if (DataLength & 0x3) /* Not an aligned data */ + { + for (idx = DataLength; idx < ((DataLength & 0xFFFC) + 4); idx++) + { + MAL_Buffer[idx] = 0xFF; + } + } + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + /* Reinitialize the intermediate buffer pointer */ + mempBuffer = memBuffer; + + /* If the address is not aligned to half-page fill the first location with existing data */ + if (((uint32_t)memPointer & 0x7F) != 0) + { + /* get the aligned address */ + tmp = (uint32_t *)((uint32_t)memPointer & 0xFFFFFF80); + + /* Read the first part from the memory */ + while (tmp < memPointer) + { + *(uint32_t *)(mempBuffer++) = *(uint32_t *)(tmp++); + } + } + + while (malPointer < (uint32_t*)(MAL_Buffer + DataLength)) + { + /* Fill with the received buffer */ + while (mempBuffer < (memBuffer + 32)) + { + /* If there are still data available in the received buffer */ + if (malPointer < ((uint32_t *)MAL_Buffer + DataLength)) + { + *(uint32_t *)(mempBuffer++) = *(uint32_t *)(malPointer++); + } + else /* no more data available in the received buffer: fill remaining with dummy 0 */ + { + *(uint32_t *)(mempBuffer++) = 0; + } + } + + /* Write the buffer to the memory*/ + FLASH_ProgramHalfPage(((uint32_t)memPointer & 0xFFFFFF80), (uint32_t *)(memBuffer)); + + /* Increment the memory pointer */ + memPointer = (uint32_t *)(((uint32_t)memPointer & 0xFFFFFF80) + (32*4)); + + /* Reinitialize the intermediate buffer pointer */ + mempBuffer = memBuffer; + } + +#else + + /* Data received are Word multiple */ + for (idx = 0; idx < DataLength; idx = idx + 4) + { + FLASH_ProgramWord(SectorAddress, *(uint32_t *)(MAL_Buffer + idx)); + SectorAddress += 4; + } +#endif /* STM32L1XX_XD */ + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : FLASH_If_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : buffer address pointer +*******************************************************************************/ +uint8_t *FLASH_If_Read (uint32_t SectorAddress, uint32_t DataLength) +{ + return (uint8_t*)(SectorAddress); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/fsmc_nor.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/fsmc_nor.c new file mode 100644 index 0000000..cdcfcdf --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/fsmc_nor.c @@ -0,0 +1,427 @@ +/** + ****************************************************************************** + * @file fsmc_nor.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file provides a set of functions needed to drive the M29W128FL, + * M29W128GL and S29GL128P NOR memories mounted on STM3210E-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "fsmc_nor.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +#define Bank1_NOR2_ADDR ((uint32_t)0x64000000) + +/* Delay definition */ +#define BlockErase_Timeout ((uint32_t)0x00A00000) +#define ChipErase_Timeout ((uint32_t)0x30000000) +#define Program_Timeout ((uint32_t)0x00001400) + +/* Private macro -------------------------------------------------------------*/ +#define ADDR_SHIFT(A) (Bank1_NOR2_ADDR + (2 * (A))) +#define NOR_WRITE(Address, Data) (*(__IO uint16_t *)(Address) = (Data)) + +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : FSMC_NOR_Init +* Description : Configures the FSMC and GPIOs to interface with the NOR memory. +* This function must be called before any write/read operation +* on the NOR. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void FSMC_NOR_Init(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + GPIO_InitTypeDef GPIO_InitStructure; + + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | + RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG, ENABLE); + + /*-- GPIO Configuration ------------------------------------------------------*/ + /* NOR Data lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | + GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | + GPIO_Pin_14 | GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + /* NOR Address lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | + GPIO_Pin_14 | GPIO_Pin_15; + GPIO_Init(GPIOF, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | + GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + /* NOE and NWE configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /* NE2 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_Init(GPIOG, &GPIO_InitStructure); + + /*-- FSMC Configuration ----------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0x02; + p.FSMC_AddressHoldTime = 0x00; + p.FSMC_DataSetupTime = 0x05; + p.FSMC_BusTurnAroundDuration = 0x00; + p.FSMC_CLKDivision = 0x00; + p.FSMC_DataLatency = 0x00; + p.FSMC_AccessMode = FSMC_AccessMode_B; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /* Enable FSMC Bank1_NOR Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); +} + +/****************************************************************************** +* Function Name : FSMC_NOR_ReadID +* Description : Reads NOR memory's Manufacturer and Device Code. +* Input : - NOR_ID: pointer to a NOR_IDTypeDef structure which will hold +* the Manufacturer and Device Code. +* Output : None +* Return : None +*******************************************************************************/ +void FSMC_NOR_ReadID(NOR_IDTypeDef* NOR_ID) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0090); + + NOR_ID->Manufacturer_Code = *(__IO uint16_t *) ADDR_SHIFT(0x0000); + NOR_ID->Device_Code1 = *(__IO uint16_t *) ADDR_SHIFT(0x0001); + NOR_ID->Device_Code2 = *(__IO uint16_t *) ADDR_SHIFT(0x000E); + NOR_ID->Device_Code3 = *(__IO uint16_t *) ADDR_SHIFT(0x000F); +} + +/******************************************************************************* +* Function Name : FSMC_NOR_EraseBlock +* Description : Erases the specified Nor memory block. +* Input : - BlockAddr: address of the block to erase. +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_EraseBlock(uint32_t BlockAddr) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + BlockAddr), 0x30); + + return (FSMC_NOR_GetStatus(BlockErase_Timeout)); +} + +/******************************************************************************* +* Function Name : FSMC_NOR_EraseChip +* Description : Erases the entire chip. +* Input : None +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_EraseChip(void) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010); + + return (FSMC_NOR_GetStatus(ChipErase_Timeout)); +} + +/****************************************************************************** +* Function Name : FSMC_NOR_WriteHalfWord +* Description : Writes a half-word to the NOR memory. +* Input : - WriteAddr : NOR memory internal address to write to. +* - Data : Data to write. +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_WriteHalfWord(uint32_t WriteAddr, uint16_t Data) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00A0); + NOR_WRITE((Bank1_NOR2_ADDR + WriteAddr), Data); + + return (FSMC_NOR_GetStatus(Program_Timeout)); +} + +/******************************************************************************* +* Function Name : FSMC_NOR_WriteBuffer +* Description : Writes a half-word buffer to the FSMC NOR memory. +* Input : - pBuffer : pointer to buffer. +* - WriteAddr : NOR memory internal address from which the data +* will be written. +* - NumHalfwordToWrite : number of Half words to write. +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) +{ + NOR_Status status = NOR_ONGOING; + + do + { + /* Transfer data to the memory */ + status = FSMC_NOR_WriteHalfWord(WriteAddr, *pBuffer++); + WriteAddr = WriteAddr + 2; + NumHalfwordToWrite--; + } + while((status == NOR_SUCCESS) && (NumHalfwordToWrite != 0)); + + return (status); +} + +/******************************************************************************* +* Function Name : FSMC_NOR_ProgramBuffer +* Description : Writes a half-word buffer to the FSMC NOR memory. This function +* must be used only with S29GL128P NOR memory. +* Input : - pBuffer : pointer to buffer. +* - WriteAddr: NOR memory internal address from which the data +* will be written. +* - NumHalfwordToWrite: number of Half words to write. +* The maximum allowed value is 32 Half words (64 bytes). +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) +{ + uint32_t lastloadedaddress = 0x00; + uint32_t currentaddress = 0x00; + uint32_t endaddress = 0x00; + + /* Initialize variables */ + currentaddress = WriteAddr; + endaddress = WriteAddr + NumHalfwordToWrite - 1; + lastloadedaddress = WriteAddr; + + /* Issue unlock command sequence */ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + + /* Write Write Buffer Load Command */ + NOR_WRITE(ADDR_SHIFT(WriteAddr), 0x0025); + NOR_WRITE(ADDR_SHIFT(WriteAddr), (NumHalfwordToWrite - 1)); + + /* Load Data into NOR Buffer */ + while(currentaddress <= endaddress) + { + /* Store last loaded address & data value (for polling) */ + lastloadedaddress = currentaddress; + + NOR_WRITE(ADDR_SHIFT(currentaddress), *pBuffer++); + currentaddress += 1; + } + + NOR_WRITE(ADDR_SHIFT(lastloadedaddress), 0x29); + + return(FSMC_NOR_GetStatus(Program_Timeout)); +} + +/****************************************************************************** +* Function Name : FSMC_NOR_ReadHalfWord +* Description : Reads a half-word from the NOR memory. +* Input : - ReadAddr : NOR memory internal address to read from. +* Output : None +* Return : Half-word read from the NOR memory +*******************************************************************************/ +uint16_t FSMC_NOR_ReadHalfWord(uint32_t ReadAddr) +{ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0 ); + + return (*(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr))); +} + +/******************************************************************************* +* Function Name : FSMC_NOR_ReadBuffer +* Description : Reads a block of data from the FSMC NOR memory. +* Input : - pBuffer : pointer to the buffer that receives the data read +* from the NOR memory. +* - ReadAddr : NOR memory internal address to read from. +* - NumHalfwordToRead : number of Half word to read. +* Output : None +* Return : None +*******************************************************************************/ +void FSMC_NOR_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0); + + for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /* while there is data to read */ + { + /* Read a Halfword from the NOR */ + *pBuffer++ = *(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr)); + ReadAddr = ReadAddr + 2; + } +} + +/****************************************************************************** +* Function Name : FSMC_NOR_ReturnToReadMode +* Description : Returns the NOR memory to Read mode. +* Input : None +* Output : None +* Return : NOR_SUCCESS +*******************************************************************************/ +NOR_Status FSMC_NOR_ReturnToReadMode(void) +{ + NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0); + + return (NOR_SUCCESS); +} + +/****************************************************************************** +* Function Name : FSMC_NOR_Reset +* Description : Returns the NOR memory to Read mode and resets the errors in +* the NOR memory Status Register. +* Input : None +* Output : None +* Return : NOR_SUCCESS +*******************************************************************************/ +NOR_Status FSMC_NOR_Reset(void) +{ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055); + NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0); + + return (NOR_SUCCESS); +} + +/****************************************************************************** +* Function Name : FSMC_NOR_GetStatus +* Description : Returns the NOR operation status. +* Input : - Timeout: NOR programming Timeout +* Output : None +* Return : NOR_Status:The returned value can be: NOR_SUCCESS, NOR_ERROR +* or NOR_TIMEOUT +*******************************************************************************/ +NOR_Status FSMC_NOR_GetStatus(uint32_t Timeout) +{ + uint16_t val1 = 0x00, val2 = 0x00; + NOR_Status status = NOR_ONGOING; + uint32_t timeout = Timeout; + + /* Poll on NOR memory Ready/Busy signal ------------------------------------*/ + while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) != RESET) && (timeout > 0)) + { + timeout--; + } + + timeout = Timeout; + + while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) == RESET) && (timeout > 0)) + { + timeout--; + } + + /* Get the NOR memory operation status -------------------------------------*/ + while((Timeout != 0x00) && (status != NOR_SUCCESS)) + { + Timeout--; + + /* Read DQ6 and DQ5 */ + val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + + /* If DQ6 did not toggle between the two reads then return NOR_Success */ + if((val1 & 0x0040) == (val2 & 0x0040)) + { + return NOR_SUCCESS; + } + + if((val1 & 0x0020) != 0x0020) + { + status = NOR_ONGOING; + } + + val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + + if((val1 & 0x0040) == (val2 & 0x0040)) + { + return NOR_SUCCESS; + } + else if((val1 & 0x0020) == 0x0020) + { + return NOR_ERROR; + } + } + + if(Timeout == 0x00) + { + status = NOR_TIMEOUT; + } + + /* Return the operation status */ + return (status); +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/spi_if.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/spi_if.c new file mode 100644 index 0000000..8588f39 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/spi_if.c @@ -0,0 +1,110 @@ +/** + ****************************************************************************** + * @file spi_if.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief specific media access Layer for SPI flash + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "spi_if.h" +#include "dfu_mal.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : SPI_If_Init +* Description : Initializes the Media on the STM32 +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t SPI_If_Init(void) +{ + sFLASH_Init(); + return MAL_OK; +} + +/******************************************************************************* +* Function Name : SPI_If_Erase +* Description : Erase sector +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t SPI_If_Erase(uint32_t SectorAddress) +{ + sFLASH_EraseSector(SectorAddress); + return MAL_OK; +} + +/******************************************************************************* +* Function Name : SPI_If_Write +* Description : Write sectors +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t SPI_If_Write(uint32_t SectorAddress, uint32_t DataLength) +{ + uint32_t idx, pages; + + pages = (((DataLength & 0xFF00)) >> 8); + + if (DataLength & 0xFF) /* Not a 256 aligned data */ + { + for ( idx = DataLength; idx < ((DataLength & 0xFF00) + 0x100) ; idx++) + { + MAL_Buffer[idx] = 0xFF; + } + pages = (((DataLength & 0xFF00)) >> 8 ) + 1; + } + + for (idx = 0; idx < pages; idx++) + { + sFLASH_WritePage(&MAL_Buffer[idx*256], SectorAddress, 256); + SectorAddress += 0x100; + } + return MAL_OK; +} + +/******************************************************************************* +* Function Name : SPI_If_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : buffer address pointer +*******************************************************************************/ +uint8_t *SPI_If_Read(uint32_t SectorAddress, uint32_t DataLength) +{ + sFLASH_ReadBuffer(MAL_Buffer, SectorAddress, (uint16_t)DataLength); + return MAL_Buffer; +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f30x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f30x.c new file mode 100644 index 0000000..31faf5c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f30x.c @@ -0,0 +1,382 @@ +/** + ****************************************************************************** + * @file system_stm32f30x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F30x devices, + * and is generated by the clock configuration tool + * stm32f30x_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f30x.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f30x.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32f30x.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F30x device + *----------------------------------------------------------------------------- + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 8000000 + *---------------------------------------------------------------------------- + * PLLMUL | 9 + *----------------------------------------------------------------------------- + * PREDIV | 1 + *----------------------------------------------------------------------------- + * USB Clock | ENABLE + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 2 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f30x_system + * @{ + */ + +/** @addtogroup STM32F30x_System_Private_Includes + * @{ + */ + +#include "stm32f30x.h" + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Defines + * @{ + */ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Variables + * @{ + */ + + uint32_t SystemCoreClock = 72000000; + + __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR &= 0xF87FC00C; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW and TIMs bits */ + RCC->CFGR3 &= (uint32_t)0xFF00FCCC; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings ----------------------------------*/ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f30x.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f30x.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK / 2 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f37x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f37x.c new file mode 100644 index 0000000..943f188 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f37x.c @@ -0,0 +1,380 @@ +/** + ****************************************************************************** + * @file system_stm32f37x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F37x devices, + * and is generated by the clock configuration tool + * STM32f37x_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f37x.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f37x.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" defined + * in "stm32f37x.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F37x device + *============================================================================= + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 8000000 + *---------------------------------------------------------------------------- + * PLLMUL | 9 + *----------------------------------------------------------------------------- + * PREDIV | 1 + *----------------------------------------------------------------------------- + * USB Clock | ENABLE + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 2 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup STM32F37x_System + * @{ + */ + +/** @addtogroup STM32F37x_System_Private_Includes + * @{ + */ + +#include "stm32f37x.h" + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 72000000; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F37x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontrollers system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, SDADCPRE and MCOSEL[2:0] bits */ + RCC->CFGR &= (uint32_t)0x00FF0000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW and CECSW bits */ + RCC->CFGR3 &= (uint32_t)0xFFF0F8C; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + +/* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f37x.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK / 2 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_desc.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_desc.c new file mode 100644 index 0000000..1646763 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_desc.c @@ -0,0 +1,489 @@ +/** + ****************************************************************************** + * @file usb_desc.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Descriptors for Device Firmware Upgrade (DFU) + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_desc.h" +#include "platform_config.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +uint8_t DFU_DeviceDescriptor[DFU_SIZ_DEVICE_DESC] = + { + 0x12, /* bLength */ + 0x01, /* bDescriptorType */ + 0x00, /* bcdUSB, version 1.00 */ + 0x01, + 0x00, /* bDeviceClass : See interface */ + 0x00, /* bDeviceSubClass : See interface*/ + 0x00, /* bDeviceProtocol : See interface */ + bMaxPacketSize0, /* bMaxPacketSize0 0x40 = 64 */ + 0x83, /* idVendor (0483) */ + 0x04, + 0x11, /* idProduct (0xDF11) DFU PiD*/ + 0xDF, + 0x00, /* bcdDevice*/ + 0x02, + + 0x01, /* iManufacturer : index of string Manufacturer */ + 0x02, /* iProduct : index of string descriptor of product*/ + 0x03, /* iSerialNumber : index of string serial number*/ + + 0x01 /*bNumConfigurations */ + }; + +#ifdef USE_STM3210B_EVAL +uint8_t DFU_ConfigDescriptor[DFU_SIZ_CONFIG_DESC] = + { + 0x09, /* bLength: Configuration Descriptor size */ + 0x02, /* bDescriptorType: Configuration */ + DFU_SIZ_CONFIG_DESC, /* wTotalLength: Bytes returned */ + 0x00, + 0x01, /* bNumInterfaces: 1 interface */ + 0x01, /* bConfigurationValue: */ + /* Configuration value */ + 0x00, /* iConfiguration: */ + /* Index of string descriptor */ + /* describing the configuration */ + 0xC0, /* bmAttributes: */ + /* Self powered */ + 0x32, /* MaxPower 100 mA */ + /* 09 */ + + /************ Descriptor of DFU interface 0 Alternate setting 0 *********/ + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x04, /* iInterface: */ + /* Index of string descriptor */ + /* 18 */ + + /************ Descriptor of DFU interface 0 Alternate setting 1 **********/ + + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x01, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x05, /* iInterface: */ + /* Index of string descriptor */ + /* 27 */ + + /******************** DFU Functional Descriptor********************/ + 0x09, /*blength = 9 Bytes*/ + 0x21, /* DFU Functional Descriptor*/ + 0x0B, /*bmAttribute + + bitCanDnload = 1 (bit 0) + bitCanUpload = 1 (bit 1) + bitManifestationTolerant = 0 (bit 2) + bitWillDetach = 1 (bit 3) + Reserved (bit4-6) + bitAcceleratedST = 0 (bit 7)*/ + 0xFF, /*DetachTimeOut= 255 ms*/ + 0x00, + wTransferSizeB0, + wTransferSizeB1, /* TransferSize = 1024 Byte*/ + 0x1A, /* bcdDFUVersion*/ + 0x01 + /***********************************************************/ + /*36*/ + + }; + +#elif defined (USE_STM3210E_EVAL) +uint8_t DFU_ConfigDescriptor[DFU_SIZ_CONFIG_DESC] = + { + 0x09, /* bLength: Configuration Descriptor size */ + 0x02, /* bDescriptorType: Configuration */ + DFU_SIZ_CONFIG_DESC, /* wTotalLength: Bytes returned */ + 0x00, + 0x01, /* bNumInterfaces: 1 interface */ + 0x01, /* bConfigurationValue: */ + /* Configuration value */ + 0x00, /* iConfiguration: */ + /* Index of string descriptor */ + /* describing the configuration */ + 0x80, /* bmAttributes: */ + /* bus powered */ + 0x20, /* MaxPower 100 mA: this current is used for detecting Vbus */ + /* 09 */ + + /************ Descriptor of DFU interface 0 Alternate setting 0 *********/ + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x04, /* iInterface: */ + /* Index of string descriptor */ + /* 18 */ + + /************ Descriptor of DFU interface 0 Alternate setting 1 **********/ + + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x01, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x05, /* iInterface: */ + /* Index of string descriptor */ + /* 27 */ + + /************ Descriptor of DFU interface 0 Alternate setting 2 **********/ + + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x02, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x06, /* iInterface: */ + /* Index of string descriptor */ + /* 36 */ + + /******************** DFU Functional Descriptor********************/ + 0x09, /*blength = 9 Bytes*/ + 0x21, /* DFU Functional Descriptor*/ + 0x0B, /*bmAttribute + + bitCanDnload = 1 (bit 0) + bitCanUpload = 1 (bit 1) + bitManifestationTolerant = 0 (bit 2) + bitWillDetach = 1 (bit 3) + Reserved (bit4-6) + bitAcceleratedST = 0 (bit 7)*/ + 0xFF, /*DetachTimeOut= 255 ms*/ + 0x00, + wTransferSizeB0, + wTransferSizeB1, /* TransferSize = 1024 Byte*/ + 0x1A, /* bcdDFUVersion*/ + 0x01 + /***********************************************************/ + /*45*/ + + }; + +#elif defined (USE_STM32L152_EVAL) || defined (USE_STM32L152D_EVAL) +uint8_t DFU_ConfigDescriptor[DFU_SIZ_CONFIG_DESC] = + { + 0x09, /* bLength: Configuration Descriptor size */ + 0x02, /* bDescriptorType: Configuration */ + DFU_SIZ_CONFIG_DESC, /* wTotalLength: Bytes returned */ + 0x00, + 0x01, /* bNumInterfaces: 1 interface */ + 0x01, /* bConfigurationValue: */ + /* Configuration value */ + 0x00, /* iConfiguration: */ + /* Index of string descriptor */ + /* describing the configuration */ + 0xC0, /* bmAttributes: */ + /* bus powered */ + 0x32, /* MaxPower 100 mA */ + /* 09 */ + + /************ Descriptor of DFU interface 0 Alternate setting 0 *********/ + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x04, /* iInterface: */ + /* Index of string descriptor */ + /* 18 */ + + /******************** DFU Functional Descriptor********************/ + 0x09, /*blength = 9 Bytes*/ + 0x21, /* DFU Functional Descriptor*/ + 0x0B, /*bmAttribute + + bitCanDnload = 1 (bit 0) + bitCanUpload = 1 (bit 1) + bitManifestationTolerant = 0 (bit 2) + bitWillDetach = 1 (bit 3) + Reserved (bit4-6) + bitAcceleratedST = 0 (bit 7)*/ + 0xFF, /*DetachTimeOut= 255 ms*/ + 0x00, + wTransferSizeB0, + wTransferSizeB1, /* TransferSize = 128 Bytes */ + 0x1A, /* bcdDFUVersion*/ + 0x01 + /***********************************************************/ + /*27*/ + + }; + +#elif defined (USE_STM32373C_EVAL) || defined (USE_STM32303C_EVAL) +uint8_t DFU_ConfigDescriptor[DFU_SIZ_CONFIG_DESC] = + { + 0x09, /* bLength: Configuration Descriptor size */ + 0x02, /* bDescriptorType: Configuration */ + DFU_SIZ_CONFIG_DESC, /* wTotalLength: Bytes returned */ + 0x00, + 0x01, /* bNumInterfaces: 1 interface */ + 0x01, /* bConfigurationValue: */ + /* Configuration value */ + 0x00, /* iConfiguration: */ + /* Index of string descriptor */ + /* describing the configuration */ + 0xC0, /* bmAttributes: */ + /* bus powered */ + 0x32, /* MaxPower 100 mA */ + /* 09 */ + + /************ Descriptor of DFU interface 0 Alternate setting 0 *********/ + 0x09, /* bLength: Interface Descriptor size */ + 0x04, /* bDescriptorType: */ + /* Interface descriptor type */ + 0x00, /* bInterfaceNumber: Number of Interface */ + 0x00, /* bAlternateSetting: Alternate setting */ + 0x00, /* bNumEndpoints*/ + 0xFE, /* bInterfaceClass: Application Specific Class Code */ + 0x01, /* bInterfaceSubClass : Device Firmware Upgrade Code */ + 0x02, /* nInterfaceProtocol: DFU mode protocol */ + 0x04, /* iInterface: */ + /* Index of string descriptor */ + /* 18 */ + + /******************** DFU Functional Descriptor********************/ + 0x09, /*blength = 9 Bytes*/ + 0x21, /* DFU Functional Descriptor*/ + 0x0B, /*bmAttribute + + bitCanDnload = 1 (bit 0) + bitCanUpload = 1 (bit 1) + bitManifestationTolerant = 0 (bit 2) + bitWillDetach = 1 (bit 3) + Reserved (bit4-6) + bitAcceleratedST = 0 (bit 7)*/ + 0xFF, /*DetachTimeOut= 255 ms*/ + 0x00, + wTransferSizeB0, + wTransferSizeB1, /* TransferSize = 128 Bytes */ + 0x1A, /* bcdDFUVersion*/ + 0x01 + /***********************************************************/ + /*27*/ + + }; + + +#endif /* USE_STM3210B_EVAL */ + +uint8_t DFU_StringLangId[DFU_SIZ_STRING_LANGID] = + { + DFU_SIZ_STRING_LANGID, + 0x03, + 0x09, + 0x04 /* LangID = 0x0409: U.S. English */ + }; + + +uint8_t DFU_StringVendor[DFU_SIZ_STRING_VENDOR] = + { + DFU_SIZ_STRING_VENDOR, + 0x03, + /* Manufacturer: "STMicroelectronics" */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 + }; + +uint8_t DFU_StringProduct[DFU_SIZ_STRING_PRODUCT] = + { + DFU_SIZ_STRING_PRODUCT, + 0x03, + /* Product name: "STM32 DFU" */ + 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0, ' ', 0, 'D', 0, 'F', 0, 'U', 0 + }; + +uint8_t DFU_StringSerial[DFU_SIZ_STRING_SERIAL] = + { + DFU_SIZ_STRING_SERIAL, + 0x03, + /* Serial number */ + 'S', 0, 'T', 0, 'M', 0, '3', 0, '2', 0 + }; + +#if defined (USE_STM3210B_EVAL) || defined (USE_STM32373C_EVAL) || defined (USE_STM32303C_EVAL) +uint8_t DFU_StringInterface0[DFU_SIZ_STRING_INTERFACE0] = + { + DFU_SIZ_STRING_INTERFACE0, + 0x03, + // Interface 0: "@Internal Flash /0x08000000/12*001Ka,116*001Kg" + '@', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'n', 0, 'a', 0, 'l', 0, /* 18 */ + ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, 'h', 0, ' ', 0, ' ', 0, /* 16 */ + + '/', 0, '0', 0, 'x', 0, '0', 0, '8', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, /* 22 */ + + '/', 0, '1', 0, '2', 0, '*', 0, '0', 0, '0', 0, '1', 0, 'K', 0, 'a', 0, /* 18 */ + ',', 0, '1', 0, '1', 0, '6', 0, '*', 0, '0', 0, '0', 0, '1', 0, 'K', 0, 'g', 0, /* 20 */ + }; + +#elif defined (USE_STM3210E_EVAL) + #ifdef STM32F10X_XL +uint8_t DFU_StringInterface0[DFU_SIZ_STRING_INTERFACE0] = + { + DFU_SIZ_STRING_INTERFACE0, + 0x03, + // Interface 0: "@Internal Flash /0x08000000/06*002Ka,506*002Kg" + '@', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'n', 0, 'a', 0, 'l', 0, /* 18 */ + ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, 'h', 0, ' ', 0, ' ', 0, /* 16 */ + + '/', 0, '0', 0, 'x', 0, '0', 0, '8', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, /* 22 */ + + '/', 0, '0', 0, '6', 0, '*', 0, '0', 0, '0', 0, '2', 0, 'K', 0, 'a', 0, /* 18 */ + ',', 0, '5', 0, '0', 0, '6', 0, '*', 0, '0', 0, '0', 0, '2', 0, 'K', 0, 'g', 0, /* 20 */ + }; + #else +uint8_t DFU_StringInterface0[DFU_SIZ_STRING_INTERFACE0] = + { + DFU_SIZ_STRING_INTERFACE0, + 0x03, + // Interface 0: "@Internal Flash /0x08000000/06*002Ka,250*002Kg" + '@', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'n', 0, 'a', 0, 'l', 0, /* 18 */ + ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, 'h', 0, ' ', 0, ' ', 0, /* 16 */ + + '/', 0, '0', 0, 'x', 0, '0', 0, '8', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, /* 22 */ + + '/', 0, '0', 0, '6', 0, '*', 0, '0', 0, '0', 0, '2', 0, 'K', 0, 'a', 0, /* 18 */ + ',', 0, '2', 0, '5', 0, '0', 0, '*', 0, '0', 0, '0', 0, '2', 0, 'K', 0, 'g', 0, /* 20 */ + }; + #endif /* STM32F10X_XL */ + +#elif defined (USE_STM32L152_EVAL) +uint8_t DFU_StringInterface0[DFU_SIZ_STRING_INTERFACE0] = + { + DFU_SIZ_STRING_INTERFACE0, + 0x03, + // Interface 0: "@Internal Flash /0x08000000/48*256 a,464*256 g" + '@', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'n', 0, 'a', 0, 'l', 0, /* 18 */ + ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, 'h', 0, ' ', 0, ' ', 0, /* 16 */ + + '/', 0, '0', 0, 'x', 0, '0', 0, '8', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, /* 22 */ + + '/', 0, '4', 0, '8', 0, '*', 0, '2', 0, '5', 0, '6', 0, ' ', 0, 'a', 0, /* 18 */ + ',', 0, '4', 0, '6', 0, '4', 0, '*', 0, '2', 0, '5', 0, '6', 0, ' ', 0, 'g', 0, /* 20 */ + + }; + + +#elif defined (USE_STM32L152D_EVAL) +uint8_t DFU_StringInterface0[DFU_SIZ_STRING_INTERFACE0] = + { + DFU_SIZ_STRING_INTERFACE0, + 0x03, + // Interface 0: "@Internal Flash /0x08000000/48*256 a,1488*256 g" + '@', 0, 'I', 0, 'n', 0, 't', 0, 'e', 0, 'r', 0, 'n', 0, 'a', 0, 'l', 0, /* 18 */ + ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, 'h', 0, ' ', 0, ' ', 0, /* 16 */ + + '/', 0, '0', 0, 'x', 0, '0', 0, '8', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, /* 22 */ + + '/', 0, '4', 0, '8', 0, '*', 0, '2', 0, '5', 0, '6', 0, ' ', 0, 'a', 0, /* 18 */ + ',', 0, '1', 0, '4', 0, '8', 0, '8', 0, '*', 0, '2', 0, '5', 0, '6', 0, ' ', 0, 'g', 0, /* 22 */ + }; + +#endif /* USE_STM3210B_EVAL */ + +#if defined(USE_STM3210B_EVAL) || defined(USE_STM3210E_EVAL) +uint8_t DFU_StringInterface1[DFU_SIZ_STRING_INTERFACE1] = + { + DFU_SIZ_STRING_INTERFACE1, + 0x03, + // Interface 1: "@ SPI Flash: M25P64 /0x00000000/128*064Kg" + '@', 0, 'S', 0, 'P', 0, 'I', 0, ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, + 'h', 0, ' ', 0, ':', 0, ' ', 0, 'M', 0, '2', 0, '5', 0, 'P', 0, '6', 0, '4', 0, + '/', 0, '0', 0, 'x', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, + '/', 0, '1', 0, '2', 0, '8', 0, '*', 0, '6', 0, '4', 0, 'K', 0, 'g', 0 + }; +#endif /* USE_STM3210B_EVAL or USE_STM3210E_EVAL */ + +#ifdef USE_STM3210E_EVAL +uint8_t DFU_StringInterface2_1[DFU_SIZ_STRING_INTERFACE2] = + { + DFU_SIZ_STRING_INTERFACE2, + 0x03, + // Interface 1: "@ NOR Flash: M29W128 /0x64000000/256*064Kg" + '@', 0, 'N', 0, 'O', 0, 'R', 0, ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, + 'h', 0, ' ', 0, ':', 0, ' ', 0, 'M', 0, '2', 0, '9', 0, 'W', 0, '1', 0, '2', 0, '8', 0, 'F', 0, + '/', 0, '0', 0, 'x', 0, '6', 0, '4', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, + '/', 0, '0', 0, '2', 0, '5', 0, '6', 0, '*', 0, '6', 0, '4', 0, 'K', 0, 'g', 0 + }; +uint8_t DFU_StringInterface2_2[DFU_SIZ_STRING_INTERFACE2] = + { + DFU_SIZ_STRING_INTERFACE2, + 0x03, + // Interface 1: "@ NOR Flash: M29W128 /0x64000000/128*128Kg" + '@', 0, 'N', 0, 'O', 0, 'R', 0, ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, + 'h', 0, ' ', 0, ':', 0, ' ', 0, 'M', 0, '2', 0, '9', 0, 'W', 0, '1', 0, '2', 0, '8', 0, 'G', 0, + '/', 0, '0', 0, 'x', 0, '6', 0, '4', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, + '/', 0, '1', 0, '2', 0, '8', 0, '*', 0, '1', 0, '2', 0, '8', 0, 'K', 0, 'g', 0 + }; + +uint8_t DFU_StringInterface2_3[DFU_SIZ_STRING_INTERFACE2] = + { + DFU_SIZ_STRING_INTERFACE2, + 0x03, + // Interface 1: "@ NOR Flash:S29GL128 /0x64000000/128*128Kg" + '@', 0, 'N', 0, 'O', 0, 'R', 0, ' ', 0, 'F', 0, 'l', 0, 'a', 0, 's', 0, + 'h', 0, ' ', 0, ':', 0, ' ', 0, 'S', 0, '2', 0, '9', 0, 'G', 0, 'L', 0 , '1', 0, '2', 0, '8', 0, + '/', 0, '0', 0, 'x', 0, '6', 0, '4', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, '0', 0, + '/', 0, '1', 0, '2', 0, '8', 0, '*', 0, '1', 0, '2', 0, '8', 0, 'K', 0, 'g', 0 + }; +#endif /* USE_STM3210E_EVAL */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_prop.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_prop.c new file mode 100644 index 0000000..addfc43 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_prop.c @@ -0,0 +1,745 @@ +/** + ****************************************************************************** + * @file usb_prop.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief All processings related to DFU demo + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_lib.h" +#include "hw_config.h" +#include "usb_conf.h" +#include "usb_prop.h" +#include "usb_desc.h" +#include "usb_pwr.h" +#include "dfu_mal.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +uint32_t wBlockNum = 0, wlength = 0; +uint32_t Manifest_State = Manifest_complete; +uint32_t Pointer = ApplicationAddress; /* Base Address to Erase, Program or Read */ + +DEVICE Device_Table = + { + EP_NUM, + 1 + }; + +DEVICE_PROP Device_Property = + { + DFU_init, + DFU_Reset, + DFU_Status_In, + DFU_Status_Out, + DFU_Data_Setup, + DFU_NoData_Setup, + DFU_Get_Interface_Setting, + DFU_GetDeviceDescriptor, + DFU_GetConfigDescriptor, + DFU_GetStringDescriptor, + 0, /*DFU_EP0Buffer*/ + bMaxPacketSize0 /*Max Packet size*/ + }; + +USER_STANDARD_REQUESTS User_Standard_Requests = + { + DFU_GetConfiguration, + DFU_SetConfiguration, + DFU_GetInterface, + DFU_SetInterface, + DFU_GetStatus, + DFU_ClearFeature, + DFU_SetEndPointFeature, + DFU_SetDeviceFeature, + DFU_SetDeviceAddress + }; + +ONE_DESCRIPTOR Device_Descriptor = + { + (uint8_t*)DFU_DeviceDescriptor, + DFU_SIZ_DEVICE_DESC + }; + +ONE_DESCRIPTOR Config_Descriptor = + { + (uint8_t*)DFU_ConfigDescriptor, + DFU_SIZ_CONFIG_DESC + }; +#ifdef USE_STM3210E_EVAL + ONE_DESCRIPTOR DFU_String_Descriptor[7] = +#elif defined(USE_STM3210B_EVAL) + ONE_DESCRIPTOR DFU_String_Descriptor[6] = +#elif defined(USE_STM32L152_EVAL) || defined(USE_STM32L152D_EVAL) ||defined(USE_STM32373C_EVAL) ||defined(USE_STM32303C_EVAL) + ONE_DESCRIPTOR DFU_String_Descriptor[5] = +#endif /* USE_STM3210E_EVAL */ + { + { (uint8_t*)DFU_StringLangId, DFU_SIZ_STRING_LANGID }, + { (uint8_t*)DFU_StringVendor, DFU_SIZ_STRING_VENDOR }, + { (uint8_t*)DFU_StringProduct, DFU_SIZ_STRING_PRODUCT }, + { (uint8_t*)DFU_StringSerial, DFU_SIZ_STRING_SERIAL }, + { (uint8_t*)DFU_StringInterface0, DFU_SIZ_STRING_INTERFACE0 } +#ifdef USE_STM3210B_EVAL + , + { (uint8_t*)DFU_StringInterface1, DFU_SIZ_STRING_INTERFACE1 } +#endif /* USE_STM3210B_EVAL */ +#ifdef USE_STM3210E_EVAL + , + { (uint8_t*)DFU_StringInterface1, DFU_SIZ_STRING_INTERFACE1 }, + { (uint8_t*)DFU_StringInterface2_1, DFU_SIZ_STRING_INTERFACE2 } +#endif /* USE_STM3210E_EVAL */ + }; + +/* Extern variables ----------------------------------------------------------*/ +extern uint8_t DeviceState ; +extern uint8_t DeviceStatus[6]; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : DFU_init. +* Description : DFU init routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_init(void) +{ + DEVICE_INFO *pInfo = &Device_Info; + + /* Update the serial number string descriptor with the data from the unique ID*/ + Get_SerialNum(); + + pInfo->Current_Configuration = 0; + + /* Connect the device */ + PowerOn(); + + /* Perform basic device initialization operations */ + USB_SIL_Init(); + + /* Enable USB interrupts */ + USB_Interrupts_Config(); + + bDeviceState = UNCONNECTED; +} + +/******************************************************************************* +* Function Name : DFU_Reset. +* Description : DFU reset routine +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_Reset(void) +{ + /* Set DFU_DEVICE as not configured */ + Device_Info.Current_Configuration = 0; + + /* Current Feature initialization */ + pInformation->Current_Feature = DFU_ConfigDescriptor[7]; + + _SetBTABLE(BTABLE_ADDRESS); + + /* Initialize Endpoint 0 */ + _SetEPType(ENDP0, EP_CONTROL); + _SetEPTxStatus(ENDP0, EP_TX_NAK); + _SetEPRxAddr(ENDP0, ENDP0_RXADDR); + SetEPRxCount(ENDP0, Device_Property.MaxPacketSize); + _SetEPTxAddr(ENDP0, ENDP0_TXADDR); + SetEPTxCount(ENDP0, Device_Property.MaxPacketSize); + Clear_Status_Out(ENDP0); + SetEPRxValid(ENDP0); + + /* Set this device to response on default address */ + SetDeviceAddress(0); + + /* Set the new control state of the device to Attached */ + bDeviceState = ATTACHED; +} +/******************************************************************************* +* Function Name : DFU_SetConfiguration. +* Description : Update the device state to configured. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_SetConfiguration(void) +{ + DEVICE_INFO *pInfo = &Device_Info; + + if (pInfo->Current_Configuration != 0) + { + /* Device configured */ + bDeviceState = CONFIGURED; + } +} +/******************************************************************************* +* Function Name : DFU_SetConfiguration. +* Description : Update the device state to addressed. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_SetDeviceAddress (void) +{ + bDeviceState = ADDRESSED; +} +/******************************************************************************* +* Function Name : DFU_Status_In. +* Description : DFU status IN routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_Status_In(void) +{} + +/******************************************************************************* +* Function Name : DFU_Status_Out. +* Description : DFU status OUT routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_Status_Out (void) +{ + DEVICE_INFO *pInfo = &Device_Info; + uint32_t Addr; + + if (pInfo->USBbRequest == DFU_GETSTATUS) + { + if (DeviceState == STATE_dfuDNBUSY) + { + if (wBlockNum == 0) /* Decode the Special Command*/ + { + if ((MAL_Buffer[0] == CMD_GETCOMMANDS) && (wlength == 1)) + {} + else if (( MAL_Buffer[0] == CMD_SETADDRESSPOINTER ) && (wlength == 5)) + { + Pointer = MAL_Buffer[1]; + Pointer += MAL_Buffer[2] << 8; + Pointer += MAL_Buffer[3] << 16; + Pointer += MAL_Buffer[4] << 24; + } + else if (( MAL_Buffer[0] == CMD_ERASE ) && (wlength == 5)) + { + Pointer = MAL_Buffer[1]; + Pointer += MAL_Buffer[2] << 8; + Pointer += MAL_Buffer[3] << 16; + Pointer += MAL_Buffer[4] << 24; + MAL_Erase(Pointer); + } + } + + else if (wBlockNum > 1) // Download Command + { + Addr = ((wBlockNum - 2) * wTransferSize) + Pointer; + MAL_Write(Addr, wlength); + } + wlength = 0; + wBlockNum = 0; + + DeviceState = STATE_dfuDNLOAD_SYNC; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + return; + } + else if (DeviceState == STATE_dfuMANIFEST)/* Manifestation in progress*/ + { + DFU_write_crc(); + return; + } + } + return; +} + +/******************************************************************************* +* Function Name : DFU_Data_Setup. +* Description : Handle the data class specific requests. +* Input : RequestNb. +* Output : None. +* Return : USB_SUCCESS or USB_UNSUPPORT. +*******************************************************************************/ +RESULT DFU_Data_Setup(uint8_t RequestNo) +{ + uint8_t *(*CopyRoutine)(uint16_t); + CopyRoutine = NULL; + + if (Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) + { + if (RequestNo == DFU_UPLOAD && (DeviceState == STATE_dfuIDLE + || DeviceState == STATE_dfuUPLOAD_IDLE )) + { + CopyRoutine = UPLOAD; + } + else if (RequestNo == DFU_DNLOAD && (DeviceState == STATE_dfuIDLE + || DeviceState == STATE_dfuDNLOAD_IDLE)) + { + DeviceState = STATE_dfuDNLOAD_SYNC; + CopyRoutine = DNLOAD; + } + else if (RequestNo == DFU_GETSTATE) + { + CopyRoutine = GETSTATE; + } + else if (RequestNo == DFU_GETSTATUS) + { + CopyRoutine = GETSTATUS; + } + else + { + return USB_UNSUPPORT; + } + } + else + { + return USB_UNSUPPORT; + } + + if (CopyRoutine == NULL) + { + return USB_UNSUPPORT; + } + + pInformation->Ctrl_Info.CopyData = CopyRoutine; + pInformation->Ctrl_Info.Usb_wOffset = 0; + (*CopyRoutine)(0); + + return USB_SUCCESS; +} + +/******************************************************************************* +* Function Name : DFU_NoData_Setup. +* Description : Handle the No data class specific requests. +* Input : Request Nb. +* Output : None. +* Return : USB_SUCCESS or USB_UNSUPPORT. +*******************************************************************************/ +RESULT DFU_NoData_Setup(uint8_t RequestNo) +{ + + if (Type_Recipient == (CLASS_REQUEST | INTERFACE_RECIPIENT)) + { + /*DFU_NDLOAD*/ + if (RequestNo == DFU_DNLOAD) + { + /* End of DNLOAD operation*/ + if (DeviceState == STATE_dfuDNLOAD_IDLE || DeviceState == STATE_dfuIDLE ) + { + Manifest_State = Manifest_In_Progress; + DeviceState = STATE_dfuMANIFEST_SYNC; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + DeviceStatus[4] = DeviceState; + return USB_SUCCESS; + } + } + /*DFU_UPLOAD*/ + else if (RequestNo == DFU_UPLOAD) + { + DeviceState = STATE_dfuIDLE; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + DeviceStatus[4] = DeviceState; + return USB_SUCCESS; + } + + /*DFU_CLRSTATUS*/ + else if (RequestNo == DFU_CLRSTATUS) + { + + if (DeviceState == STATE_dfuERROR) + { + DeviceState = STATE_dfuIDLE; + DeviceStatus[0] = STATUS_OK;/*bStatus*/ + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; /*bwPollTimeout=0ms*/ + DeviceStatus[4] = DeviceState;/*bState*/ + DeviceStatus[5] = 0;/*iString*/ + } + else + { /*State Error*/ + DeviceState = STATE_dfuERROR; + DeviceStatus[0] = STATUS_ERRUNKNOWN;/*bStatus*/ + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; /*bwPollTimeout=0ms*/ + DeviceStatus[4] = DeviceState;/*bState*/ + DeviceStatus[5] = 0;/*iString*/ + } + return USB_SUCCESS; + } + /*DFU_ABORT*/ + else if (RequestNo == DFU_ABORT) + { + if (DeviceState == STATE_dfuIDLE || DeviceState == STATE_dfuDNLOAD_SYNC + || DeviceState == STATE_dfuDNLOAD_IDLE || DeviceState == STATE_dfuMANIFEST_SYNC + || DeviceState == STATE_dfuUPLOAD_IDLE ) + { + DeviceState = STATE_dfuIDLE; + DeviceStatus[0] = STATUS_OK; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; /*bwPollTimeout=0ms*/ + DeviceStatus[4] = DeviceState; + DeviceStatus[5] = 0; /*iString*/ + wBlockNum = 0; + wlength = 0; + } + return USB_SUCCESS; + } + } + + + return USB_UNSUPPORT; + +} /* End of DFU_NoData_Setup */ + +/******************************************************************************* +* Function Name : DFU_GetDeviceDescriptor. +* Description : Gets the device descriptor. +* Input : Length. +* Output : None. +* Return : The address of the device descriptor. +*******************************************************************************/ +uint8_t *DFU_GetDeviceDescriptor(uint16_t Length) +{ + return Standard_GetDescriptorData(Length, &Device_Descriptor); +} + +/******************************************************************************* +* Function Name : DFU_GetConfigDescriptor. +* Description : Gets the configuration descriptor. +* Input : Length. +* Output : None. +* Return : The address of the configuration descriptor. +*******************************************************************************/ +uint8_t *DFU_GetConfigDescriptor(uint16_t Length) +{ + return Standard_GetDescriptorData (Length, &Config_Descriptor); +} + +/******************************************************************************* +* Function Name : DFU_GetStringDescriptor. +* Description : Gets the string descriptors according to the needed index. +* Input : Length. +* Output : None. +* Return : The address of the string descriptors. +*******************************************************************************/ +uint8_t *DFU_GetStringDescriptor(uint16_t Length) +{ + uint8_t wValue0 = pInformation->USBwValue0; + + if (wValue0 > 8) + { + return NULL; + } + else + { + return Standard_GetDescriptorData(Length, &DFU_String_Descriptor[wValue0]); + } +} + +/******************************************************************************* +* Function Name : DFU_Get_Interface_Setting. +* Description : tests the interface and the alternate setting according to the +* supported one. +* Input : - Interface : interface number. +* - AlternateSetting : Alternate Setting number. +* Output : None. +* Return : USB_SUCCESS or USB_UNSUPPORT. +*******************************************************************************/ +RESULT DFU_Get_Interface_Setting(uint8_t Interface, uint8_t AlternateSetting) +{ + if (AlternateSetting > 3) + { + return USB_UNSUPPORT; /* In this application we don't have more than 3 AlternateSettings */ + } + else if (Interface > 2) + { + return USB_UNSUPPORT; /* In this application we have only 1 interfaces */ + } + + return USB_SUCCESS; +} + +/******************************************************************************* +* Function Name : UPLOAD +* Description : Upload routine. +* Input : Length. +* Output : None. +* Return : Pointer to data. +*******************************************************************************/ +uint8_t *UPLOAD(uint16_t Length) +{ + DEVICE_INFO *pInfo = &Device_Info; + uint8_t B1, B0; + uint16_t offset, returned; + uint8_t *Phy_Addr = NULL; + uint32_t Addr = 0; + + B0 = pInfo->USBwValues.bw.bb0; + B1 = pInfo->USBwValues.bw.bb1; + wBlockNum = (uint16_t)B1; + wBlockNum = wBlockNum * 0x100; + wBlockNum += (uint16_t)B0; /* wBlockNum value updated*/ + + B0 = pInfo->USBwLengths.bw.bb0; + B1 = pInfo->USBwLengths.bw.bb1; + wlength = (uint16_t)B0; + wlength = wlength * 0x100; + wlength += (uint16_t)B1; /* wlength value updated*/ + + offset = pInformation->Ctrl_Info.Usb_wOffset; + + if (wBlockNum == 0) /* Get Command */ + { + if (wlength > 3) + { + DeviceState = STATE_dfuIDLE ; + } + else + { + DeviceState = STATE_dfuUPLOAD_IDLE; + } + + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + + MAL_Buffer[0] = CMD_GETCOMMANDS; + MAL_Buffer[1] = CMD_SETADDRESSPOINTER; + MAL_Buffer[2] = CMD_ERASE; + + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = 3 ; + return NULL; + } + + return(&MAL_Buffer[0]); + } + else if (wBlockNum > 1) + { + DeviceState = STATE_dfuUPLOAD_IDLE ; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + Addr = ((wBlockNum - 2) * wTransferSize) + Pointer; /* Change is Accelerated*/ + + Phy_Addr = MAL_Read(Addr, wlength); + returned = wlength - offset; + + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = returned ; + return NULL; + } + return(Phy_Addr + offset); + } + else /* unsupported wBlockNum */ + { + DeviceState = STATUS_ERRSTALLEDPKT; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + + return NULL; + } +} + +/******************************************************************************* +* Function Name : DNLOAD +* Description : Download routine. +* Input : Length. +* Output : None. +* Return : Pointer to data. +*******************************************************************************/ +uint8_t *DNLOAD (uint16_t Length) +{ + DEVICE_INFO *pInfo = &Device_Info; + uint8_t B1, B0; + uint16_t offset, returned; + + B0 = pInfo->USBwValues.bw.bb0; + B1 = pInfo->USBwValues.bw.bb1; + wBlockNum = (uint16_t)B1; + wBlockNum = wBlockNum * 0x100; + wBlockNum += (uint16_t)B0; + B0 = pInfo->USBwLengths.bw.bb0; + B1 = pInfo->USBwLengths.bw.bb1; + wlength = (uint16_t)B0; + wlength = wlength * 0x100; + wlength += (uint16_t)B1; + + offset = pInfo->Ctrl_Info.Usb_wOffset; + + DeviceState = STATE_dfuDNLOAD_SYNC; + DeviceStatus[4] = DeviceState; + + returned = wlength - offset; + + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = returned ; + return NULL; + } + + return((uint8_t*)MAL_Buffer + offset); +} + +/******************************************************************************* +* Function Name : GETSTATE. +* Description : Get State request routine. +* Input : Length. +* Output : None. +* Return : Pointer to data. +*******************************************************************************/ +uint8_t *GETSTATE(uint16_t Length) +{ + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = 1 ; + return NULL; + } + else + return(&DeviceState); +} + +/******************************************************************************* +* Function Name : GETSTATUS. +* Description : Get Status request routine. +* Input : Length. +* Output : None. +* Return : Pointer to data. +*******************************************************************************/ +uint8_t *GETSTATUS(uint16_t Length) +{ + switch (DeviceState) + { + case STATE_dfuDNLOAD_SYNC: + if (wlength != 0) + { + DeviceState = STATE_dfuDNBUSY; + DeviceStatus[4] = DeviceState; + if ((wBlockNum == 0) && (MAL_Buffer[0] == CMD_ERASE)) + { + MAL_GetStatus(Pointer, 0, DeviceStatus); + } + else + { + MAL_GetStatus(Pointer, 1, DeviceStatus); + } + } + else /* (wlength==0)*/ + { + DeviceState = STATE_dfuDNLOAD_IDLE; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + + } + break; + case STATE_dfuMANIFEST_SYNC : + if (Manifest_State == Manifest_In_Progress) + { + DeviceState = STATE_dfuMANIFEST; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 1; /*bwPollTimeout = 1ms*/ + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + //break; + } + else if (Manifest_State == Manifest_complete && Config_Descriptor.Descriptor[20] + & 0x04) + { + DeviceState = STATE_dfuIDLE; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + //break; + } + break; + default : + break; + } + + if (Length == 0) + { + pInformation->Ctrl_Info.Usb_wLength = 6 ; + return NULL; + } + else + return(&(DeviceStatus[0])); +} + +/******************************************************************************* +* Function Name : DFU_write_crc. +* Description : DFU Write CRC routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_write_crc(void) +{ + Manifest_State = Manifest_complete; + + if (Config_Descriptor.Descriptor[20] & 0x04) + { + DeviceState = STATE_dfuMANIFEST_SYNC; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + return; + } + else + { + DeviceState = STATE_dfuMANIFEST_WAIT_RESET; + DeviceStatus[4] = DeviceState; + DeviceStatus[1] = 0; + DeviceStatus[2] = 0; + DeviceStatus[3] = 0; + + Reset_Device(); + + return; + } +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_pwr.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_pwr.c new file mode 100644 index 0000000..a2253a8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_pwr.c @@ -0,0 +1,318 @@ +/** + ****************************************************************************** + * @file usb_pwr.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Connection/disconnection & power management + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_lib.h" +#include "usb_conf.h" +#include "usb_pwr.h" +#include "hw_config.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +__IO uint32_t bDeviceState = UNCONNECTED; /* USB device status */ +__IO bool fSuspendEnabled = TRUE; /* true when suspend is possible */ +__IO uint32_t EP[8]; + +struct +{ + __IO RESUME_STATE eState; + __IO uint8_t bESOFcnt; +} +ResumeS; + +__IO uint32_t remotewakeupon=0; + +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Extern function prototypes ------------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : PowerOn +* Description : +* Input : None. +* Output : None. +* Return : USB_SUCCESS. +*******************************************************************************/ +RESULT PowerOn(void) +{ + uint16_t wRegVal; + + /*** cable plugged-in ? ***/ + USB_Cable_Config(ENABLE); + + /*** CNTR_PWDN = 0 ***/ + wRegVal = CNTR_FRES; + _SetCNTR(wRegVal); + + /*** CNTR_FRES = 0 ***/ + wInterrupt_Mask = 0; + _SetCNTR(wInterrupt_Mask); + /*** Clear pending interrupts ***/ + _SetISTR(0); + /*** Set interrupt mask ***/ + wInterrupt_Mask = CNTR_RESETM | CNTR_SUSPM | CNTR_WKUPM; + _SetCNTR(wInterrupt_Mask); + + return USB_SUCCESS; +} + +/******************************************************************************* +* Function Name : PowerOff +* Description : handles switch-off conditions +* Input : None. +* Output : None. +* Return : USB_SUCCESS. +*******************************************************************************/ +RESULT PowerOff() +{ + /* disable all interrupts and force USB reset */ + _SetCNTR(CNTR_FRES); + /* clear interrupt status register */ + _SetISTR(0); + /* Disable the Pull-Up*/ + USB_Cable_Config(DISABLE); + /* switch-off device */ + _SetCNTR(CNTR_FRES + CNTR_PDWN); + /* sw variables reset */ + /* ... */ + + return USB_SUCCESS; +} + +/******************************************************************************* +* Function Name : Suspend +* Description : sets suspend mode operating conditions +* Input : None. +* Output : None. +* Return : USB_SUCCESS. +*******************************************************************************/ +void Suspend(void) +{ + uint32_t i =0; + uint16_t wCNTR; + uint32_t tmpreg = 0; + __IO uint32_t savePWR_CR=0; + /* suspend preparation */ + /* ... */ + + /*Store CNTR value */ + wCNTR = _GetCNTR(); + + /* This a sequence to apply a force RESET to handle a robustness case */ + + /*Store endpoints registers status */ + for (i=0;i<8;i++) EP[i] = _GetENDPOINT(i); + + /* unmask RESET flag */ + wCNTR|=CNTR_RESETM; + _SetCNTR(wCNTR); + + /*apply FRES */ + wCNTR|=CNTR_FRES; + _SetCNTR(wCNTR); + + /*clear FRES*/ + wCNTR&=~CNTR_FRES; + _SetCNTR(wCNTR); + + /*poll for RESET flag in ISTR*/ + while((_GetISTR()&ISTR_RESET) == 0); + + /* clear RESET flag in ISTR */ + _SetISTR((uint16_t)CLR_RESET); + + /*restore Enpoints*/ + for (i=0;i<8;i++) + _SetENDPOINT(i, EP[i]); + + /* Now it is safe to enter macrocell in suspend mode */ + wCNTR |= CNTR_FSUSP; + _SetCNTR(wCNTR); + + /* force low-power mode in the macrocell */ + wCNTR = _GetCNTR(); + wCNTR |= CNTR_LPMODE; + _SetCNTR(wCNTR); + + /*prepare entry in low power mode (STOP mode)*/ + /* Select the regulator state in STOP mode*/ + savePWR_CR = PWR->CR; + tmpreg = PWR->CR; + /* Clear PDDS and LPDS bits */ + tmpreg &= ((uint32_t)0xFFFFFFFC); + /* Set LPDS bit according to PWR_Regulator value */ + tmpreg |= PWR_Regulator_LowPower; + /* Store the new value */ + PWR->CR = tmpreg; + /* Set SLEEPDEEP bit of Cortex System Control Register */ +#if defined (STM32F30X) || defined (STM32F37X) + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; +#else + SCB->SCR |= SCB_SCR_SLEEPDEEP; +#endif + + /* enter system in STOP mode, only when wakeup flag in not set */ + if((_GetISTR()&ISTR_WKUP)==0) + { + __WFI(); + /* Reset SLEEPDEEP bit of Cortex System Control Register */ +#if defined (STM32F30X) || defined (STM32F37X) + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); +#else + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); +#endif + } + else + { + /* Clear Wakeup flag */ + _SetISTR(CLR_WKUP); + /* clear FSUSP to abort entry in suspend mode */ + wCNTR = _GetCNTR(); + wCNTR&=~CNTR_FSUSP; + _SetCNTR(wCNTR); + + /*restore sleep mode configuration */ + /* restore Power regulator config in sleep mode*/ + PWR->CR = savePWR_CR; + + /* Reset SLEEPDEEP bit of Cortex System Control Register */ +#if defined (STM32F30X) || defined (STM32F37X) + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); +#else + SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP); +#endif + } +} + +/******************************************************************************* +* Function Name : Resume_Init +* Description : Handles wake-up restoring normal operations +* Input : None. +* Output : None. +* Return : USB_SUCCESS. +*******************************************************************************/ +void Resume_Init(void) +{ + uint16_t wCNTR; + + /* ------------------ ONLY WITH BUS-POWERED DEVICES ---------------------- */ + /* restart the clocks */ + /* ... */ + + /* CNTR_LPMODE = 0 */ + wCNTR = _GetCNTR(); + wCNTR &= (~CNTR_LPMODE); + _SetCNTR(wCNTR); + + /* restore full power */ + /* ... on connected devices */ + Leave_LowPowerMode(); + + /* reset FSUSP bit */ + _SetCNTR(IMR_MSK); + + /* reverse suspend preparation */ + /* ... */ + +} + +/******************************************************************************* +* Function Name : Resume +* Description : This is the state machine handling resume operations and +* timing sequence. The control is based on the Resume structure +* variables and on the ESOF interrupt calling this subroutine +* without changing machine state. +* Input : a state machine value (RESUME_STATE) +* RESUME_ESOF doesn't change ResumeS.eState allowing +* decrementing of the ESOF counter in different states. +* Output : None. +* Return : None. +*******************************************************************************/ +void Resume(RESUME_STATE eResumeSetVal) +{ + uint16_t wCNTR; + + if (eResumeSetVal != RESUME_ESOF) + ResumeS.eState = eResumeSetVal; + switch (ResumeS.eState) + { + case RESUME_EXTERNAL: + if (remotewakeupon ==0) + { + Resume_Init(); + ResumeS.eState = RESUME_OFF; + } + else /* RESUME detected during the RemoteWAkeup signalling => keep RemoteWakeup handling*/ + { + ResumeS.eState = RESUME_ON; + } + break; + case RESUME_INTERNAL: + Resume_Init(); + ResumeS.eState = RESUME_START; + remotewakeupon = 1; + break; + case RESUME_LATER: + ResumeS.bESOFcnt = 2; + ResumeS.eState = RESUME_WAIT; + break; + case RESUME_WAIT: + ResumeS.bESOFcnt--; + if (ResumeS.bESOFcnt == 0) + ResumeS.eState = RESUME_START; + break; + case RESUME_START: + wCNTR = _GetCNTR(); + wCNTR |= CNTR_RESUME; + _SetCNTR(wCNTR); + ResumeS.eState = RESUME_ON; + ResumeS.bESOFcnt = 10; + break; + case RESUME_ON: + ResumeS.bESOFcnt--; + if (ResumeS.bESOFcnt == 0) + { + wCNTR = _GetCNTR(); + wCNTR &= (~CNTR_RESUME); + _SetCNTR(wCNTR); + ResumeS.eState = RESUME_OFF; + remotewakeupon = 0; + } + break; + case RESUME_OFF: + case RESUME_ESOF: + default: + ResumeS.eState = RESUME_OFF; + break; + } +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |