o Moving tinyprintf and stm libraries under thirdparty.

29 files changed, 0 insertions, 4891 deletions

diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/main.c
deleted file mode 100644
index f056195..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/main.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/DMA_WFIMode/main.c 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Main program body
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */ 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-#include "stm32_eval.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Examples
-  * @{
-  */
-
-/** @addtogroup NVIC_DMA_WFIMode
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-#ifdef USE_STM3210C_EVAL
-#define USARTy_DR_Address    0x40004404
-#define USARTy_DMA1_Channel  DMA1_Channel6
-#define USARTy_DMA1_IRQn     DMA1_Channel6_IRQn
-#else
-#define USARTy_DR_Address    0x40013804
-#define USARTy_DMA1_Channel  DMA1_Channel5
-#define USARTy_DMA1_IRQn     DMA1_Channel5_IRQn
-#endif
-
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-NVIC_InitTypeDef  NVIC_InitStructure;
-USART_InitTypeDef  USART_InitStructure;
-DMA_InitTypeDef  DMA_InitStructure;
-__IO uint32_t LowPowerMode = 0;
-uint16_t DST_Buffer[10]= {0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
-
-/* Private function prototypes -----------------------------------------------*/
-void RCC_Configuration(void);
-void DMA_Configuration(void);
-uint8_t Buffercmp16(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength);
-void Delay(__IO uint32_t nCount);
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
-  * @brief  Main program.
-  * @param  None
-  * @retval None
-  */
-int main(void)
-{
-  /*!< At this stage the microcontroller clock setting is already configured, 
-       this is done through SystemInit() function which is called from startup
-       file (startup_stm32f10x_xx.s) before to branch to application main.
-       To reconfigure the default setting of SystemInit() function, refer to
-       system_stm32f10x.c file
-     */     
-       
-  /* Configure the system clocks */
-  RCC_Configuration();
-
-  /* Initialize Leds and Key Button mounted on STM3210X-EVAL board */       
-  STM_EVAL_LEDInit(LED1);
-  STM_EVAL_LEDInit(LED2);
-  STM_EVAL_LEDInit(LED3);
-  STM_EVAL_LEDInit(LED4);
-  STM_EVAL_PBInit(BUTTON_KEY, BUTTON_MODE_EXTI); 
- 
-  /* Configures the DMA Channel */
-  DMA_Configuration();
-  
-/* EVAL_COM1 configuration ---------------------------------------------------*/
-  /* EVAL_COM1 configured as follow:
-        - BaudRate = 115200 baud  
-        - Word Length = 8 Bits
-        - One Stop Bit
-        - No parity
-        - Hardware flow control disabled (RTS and CTS signals)
-        - Receive and transmit enabled
-  */
-  USART_InitStructure.USART_BaudRate = 115200;
-  USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-  USART_InitStructure.USART_StopBits = USART_StopBits_1;
-  USART_InitStructure.USART_Parity = USART_Parity_No;
-  USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-  USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
-
-  STM_EVAL_COMInit(COM1, &USART_InitStructure);
-  USART_DMACmd(EVAL_COM1, USART_DMAReq_Rx, ENABLE);
-  
-  NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
-  
-  /* Enable the USARTy_DMA1_IRQn Interrupt */
-  NVIC_InitStructure.NVIC_IRQChannel = USARTy_DMA1_IRQn;
-  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-  NVIC_Init(&NVIC_InitStructure);
-
-  /* Enable the EXTI9_5  Interrupt */
-  NVIC_InitStructure.NVIC_IRQChannel = EXTI9_5_IRQn;
-  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-  NVIC_Init(&NVIC_InitStructure);
-    
-  while (1)
-  {
-    if(LowPowerMode == 1)
-    {
-
-      STM_EVAL_LEDOff(LED2);
-      STM_EVAL_LEDOff(LED3);
-
-      /* Request to enter WFI mode */
-      __WFI();
-      LowPowerMode = 0;
-    }
-
-    Delay(0xFFFFF);
-    STM_EVAL_LEDToggle(LED1);
-  }
-}
-
-/**
-  * @brief  Configures the different system clocks
-  * @param  None
-  * @retval None
-  */
-void RCC_Configuration(void)
-{ 
-  /* DMA1 clock enable */
-  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
-}
-
-/**
-  * @brief  Configures the used DMA Channel.
-  * @param  None
-  * @retval None
-  */
-void DMA_Configuration(void)
-{
-  DMA_InitTypeDef  DMA_InitStructure;
-
-  /* USARTy_DMA1_Channel Config */
-  DMA_DeInit(USARTy_DMA1_Channel);
-  DMA_InitStructure.DMA_PeripheralBaseAddr = USARTy_DR_Address;
-  DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)DST_Buffer;
-  DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
-  DMA_InitStructure.DMA_BufferSize = 10;
-  DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
-  DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
-  DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
-  DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
-  DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
-  DMA_InitStructure.DMA_Priority = DMA_Priority_High;
-  DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
-  DMA_Init(USARTy_DMA1_Channel, &DMA_InitStructure);
-
-  /* Enable USARTy_DMA1_Channel Transfer complete interrupt */
-  DMA_ITConfig(USARTy_DMA1_Channel, DMA_IT_TC, ENABLE);
-  
-  /* USARTy_DMA1_Channel enable */
-  DMA_Cmd(USARTy_DMA1_Channel, ENABLE);
-}
-
-/**
-  * @brief  Compares two buffers.
-  * @param  pBuffer1, pBuffer2: buffers to be compared.
-  * @param  BufferLength: buffer's length
-  * @retval 0: pBuffer1 identical to pBuffer2
-  *         1: pBuffer1 differs from pBuffer2
-  */
-uint8_t Buffercmp16(uint16_t* pBuffer1, uint16_t* pBuffer2, uint16_t BufferLength)
-{
-  while(BufferLength--)
-  {
-    if(*pBuffer1 != *pBuffer2)
-    {
-      return 1;
-    }
-
-    pBuffer1++;
-    pBuffer2++;
-  }
-  return 0;
-}
-
-/**
-  * @brief  Inserts a delay time.
-  * @param  nCount: specifies the delay time length.
-  * @retval None
-  */
-void Delay(__IO uint32_t nCount)
-{
-  for(; nCount != 0; nCount--);
-}
-
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(uint8_t* file, uint32_t line)
-{ 
-  /* User can add his own implementation to report the file name and line number,
-     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-
-  /* Infinite loop */
-  while (1)
-  {
-  }
-}
-
-#endif
-
-/**
-  * @}
-  */ 
-
-/**
-  * @}
-  */ 
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/readme.txt b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/readme.txt
deleted file mode 100644
index 3a1b997..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/readme.txt
+++ /dev/null
@@ -1,169 +0,0 @@
-/**
-  @page NVIC_DMA_WFIMode DMA in WFI mode example
-  
-  @verbatim
-  ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
-  * @file    NVIC/DMA_WFIMode/readme.txt 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Description of the NVIC DMA in WFI mode example.
-  ******************************************************************************
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  ******************************************************************************
-   @endverbatim
-
-@par Example Description 
-
-This example shows how to enters the system to WFI mode with DMA transfer enabled
-and wake-up from this mode by the DMA End of Transfer interrupt.
-
-In the associated software, the system clock is set to 72 MHz (24MHz on Value line), 
-the DMA1 Channely is configured to transfer 10 data from the EVAL COM1 USART data 
-register to a predefined buffer, DST_Buffer, and to generate an interrupt at the 
-end of the transfer.
-The EVAL COM1 USART receives data from HyperTerminal.
-A LED1 is toggled with a frequency depending on the system clock, this is used 
-to indicate whether the MCU is in WFI or RUN mode. 
-
-A falling edge on the selected EXTI Line will put the core in the WFI mode, 
-causing the led pin to stop toggling.
-To wake-up from WFI mode you have to send the sequence (0, 1, 2, 3, 4, 5, 6, 7, 8, 9)
-from the Hyperterminal to the EVAL COM1 USART. These bytes will be transferred 
-by the DMA from the EVAL COM1 receive data register to the predefined buffer, 
-then generates an interrupt which exits the system from WFI mode. 
-The LED1 restarts toggling and a LED2 will toggle if the buffer is correctly 
-received else a LED3 is toggled.
-
-
-@par Directory contents 
-
-  - NVIC/DMA_WFIMode/stm32f10x_conf.h     Library Configuration file
-  - NVIC/DMA_WFIMode/stm32f10x_it.c       Interrupt handlers
-  - NVIC/DMA_WFIMode/stm32f10x_it.h       Interrupt handlers header file
-  - NVIC/DMA_WFIMode/main.c               Main program
-  - NVIC/DMA_WFIMode/system_stm32f10x.c   STM32F10x system source file
-
-@par Hardware and Software environment 
-
-  - This example runs on STM32F10x Connectivity line, High-Density, High-Density 
-    Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density 
-    and Low-Density Value line Devices.
-  
-  - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density 
-    Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), 
-    STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) 
-    evaluation boards and can be easily tailored to any other supported device 
-    and development board.
-    To select the STMicroelectronics evaluation board used to run the example, 
-    uncomment the corresponding line in stm32_eval.h file (under Utilities\STM32_EVAL)
-
-  - STM32100E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PF.06, PF0.7, PF.08
-      and PF.09 pins
-    - The USART1 signals (Rx, Tx) must be connected to a DB9 connector using a RS232
-      transceiver.
-    - Connect a null-modem female/female RS232 cable between the DB9 connector,
-      CN12 on STM3210E-EVAL board, and PC serial port.   
-    - Hyperterminal configuration:
-       - Word Length = 8 Bits
-       - One Stop Bit
-       - No parity
-       - BaudRate = 115200 baud
-       - flow control: None 
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8). 
-        
-  - STM32100B-EVAL Set-up   
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PC.06, PC.07, PC.08
-      and PC.09 pins
-    - The USART1 signals (Rx, Tx) must be connected to a DB9 connector using a RS232
-      transceiver.
-    - Connect a null-modem female/female RS232 cable between the DB9 connector, 
-      CN10 on STM32100B-EVAL board, and PC serial port.   
-    - Hyperterminal configuration:
-       - Word Length = 8 Bits
-       - One Stop Bit
-       - No parity
-       - BaudRate = 115200 baud
-       - flow control: None   
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    
-  - STM3210C-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PD.07, PD.13, PF.03
-      and PD.04 pins
-    - The USART2 signals (Rx, Tx) must be connected to a DB9 connector using a RS232
-      transceiver.
-    - Connect a null-modem female/female RS232 cable between the DB9 connector,
-      CN6 on STM3210C-EVAL board, and PC serial port.   
-    - Hyperterminal configuration:
-       - Word Length = 8 Bits
-       - One Stop Bit
-       - No parity
-       - BaudRate = 115200 baud
-       - flow control: None 
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9). 
-    
-  - STM3210E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PF.06, PF0.7, PF.08
-      and PF.09 pins
-    - The USART1 signals (Rx, Tx) must be connected to a DB9 connector using a RS232
-      transceiver.
-    - Connect a null-modem female/female RS232 cable between the DB9 connector,
-      CN12 on STM3210E-EVAL board, and PC serial port.   
-    - Hyperterminal configuration:
-       - Word Length = 8 Bits
-       - One Stop Bit
-       - No parity
-       - BaudRate = 115200 baud
-       - flow control: None 
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8).   
-
-  - STM3210B-EVAL Set-up   
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PC.06, PC.07, PC.08
-      and PC.09 pins
-    - The USART1 signals (Rx, Tx) must be connected to a DB9 connector using a RS232
-      transceiver.
-    - Connect a null-modem female/female RS232 cable between the DB9 connector, 
-      CN6 on STM3210B-EVAL board, and PC serial port.   
-    - Hyperterminal configuration:
-       - Word Length = 8 Bits
-       - One Stop Bit
-       - No parity
-       - BaudRate = 115200 baud
-       - flow control: None   
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-
-	
-@par How to use it ? 
-
-In order to make the program work, you must do the following :
- - Copy all source files from this example folder to the template folder under
-   Project\STM32F10x_StdPeriph_Template
- - Open your preferred toolchain 
- - Rebuild all files and load your image into target memory
- - Run the example 
-
-@note
- - Low-density Value line devices are STM32F100xx microcontrollers where the 
-   Flash memory density ranges between 16 and 32 Kbytes.
- - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
- - Medium-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 64 and 128 Kbytes.  
- - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
- - High-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 512 and 1024 Kbytes.
- - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
-    
- * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
- */
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/stm32f10x_conf.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/stm32f10x_conf.h
deleted file mode 100644
index f21d3d0..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/stm32f10x_conf.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/DMA_WFIMode/stm32f10x_conf.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Library configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CONF_H
-#define __STM32F10x_CONF_H
-
-/* Includes ------------------------------------------------------------------*/
-/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
-#include "stm32f10x_adc.h"
-#include "stm32f10x_bkp.h"
-#include "stm32f10x_can.h"
-#include "stm32f10x_cec.h"
-#include "stm32f10x_crc.h"
-#include "stm32f10x_dac.h"
-#include "stm32f10x_dbgmcu.h"
-#include "stm32f10x_dma.h"
-#include "stm32f10x_exti.h"
-#include "stm32f10x_flash.h"
-#include "stm32f10x_fsmc.h"
-#include "stm32f10x_gpio.h"
-#include "stm32f10x_i2c.h"
-#include "stm32f10x_iwdg.h"
-#include "stm32f10x_pwr.h"
-#include "stm32f10x_rcc.h"
-#include "stm32f10x_rtc.h"
-#include "stm32f10x_sdio.h"
-#include "stm32f10x_spi.h"
-#include "stm32f10x_tim.h"
-#include "stm32f10x_usart.h"
-#include "stm32f10x_wwdg.h"
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Uncomment the line below to expanse the "assert_param" macro in the 
-   Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function which reports 
-  *         the name of the source file and the source line number of the call 
-  *         that failed. If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#endif /* __STM32F10x_CONF_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/system_stm32f10x.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/system_stm32f10x.c
deleted file mode 100644
index 4b0bf3e..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/DMA_WFIMode/system_stm32f10x.c
+++ /dev/null
@@ -1,1094 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/DMA_WFIMode/system_stm32f10x.c
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
-  * 
-  * 1.  This file provides two functions and one global variable to be called from 
-  *     user application:
-  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
-  *                      factors, AHB/APBx prescalers and Flash settings). 
-  *                      This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32f10x_xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  * 2. After each device reset the HSI (8 MHz) is used as system clock source.
-  *    Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to
-  *    configure the system clock before to branch to main program.
-  *
-  * 3. If the system clock source selected by user fails to startup, the SystemInit()
-  *    function will do nothing and HSI still used as system clock source. User can 
-  *    add some code to deal with this issue inside the SetSysClock() function.
-  *
-  * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on
-  *    the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. 
-  *    When HSE is used as system clock source, directly or through PLL, and you
-  *    are using different crystal you have to adapt the HSE value to your own
-  *    configuration.
-  *        
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f10x_system
-  * @{
-  */  
-  
-/** @addtogroup STM32F10x_System_Private_Includes
-  * @{
-  */
-
-#include "stm32f10x.h"
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Defines
-  * @{
-  */
-
-/*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
-   frequency (after reset the HSI is used as SYSCLK source)
-   
-   IMPORTANT NOTE:
-   ============== 
-   1. After each device reset the HSI is used as System clock source.
-
-   2. Please make sure that the selected System clock doesn't exceed your device's
-      maximum frequency.
-      
-   3. If none of the define below is enabled, the HSI is used as System clock
-    source.
-
-   4. The System clock configuration functions provided within this file assume that:
-        - For Low, Medium and High density Value line devices an external 8MHz 
-          crystal is used to drive the System clock.
-        - For Low, Medium and High density devices an external 8MHz crystal is
-          used to drive the System clock.
-        - For Connectivity line devices an external 25MHz crystal is used to drive
-          the System clock.
-     If you are using different crystal you have to adapt those functions accordingly.
-    */
-    
-#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
- #define SYSCLK_FREQ_24MHz  24000000
-#else
-/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
-/* #define SYSCLK_FREQ_24MHz  24000000 */ 
-/* #define SYSCLK_FREQ_36MHz  36000000 */
-/* #define SYSCLK_FREQ_48MHz  48000000 */
-/* #define SYSCLK_FREQ_56MHz  56000000 */
-#define SYSCLK_FREQ_72MHz  72000000
-#endif
-
-/*!< Uncomment the following line if you need to use external SRAM mounted
-     on STM3210E-EVAL board (STM32 High density and XL-density devices) or on 
-     STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ 
-#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
-/* #define DATA_IN_ExtSRAM */
-#endif
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */ 
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
-                                  This value must be a multiple of 0x200. */
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Variables
-  * @{
-  */
-
-/*******************************************************************************
-*  Clock Definitions
-*******************************************************************************/
-#ifdef SYSCLK_FREQ_HSE
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_HSE;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_24MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_24MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_36MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_36MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_48MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_48MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_56MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_56MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_72MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_72MHz;        /*!< System Clock Frequency (Core Clock) */
-#else /*!< HSI Selected as System Clock source */
-  uint32_t SystemCoreClock         = HSI_VALUE;        /*!< System Clock Frequency (Core Clock) */
-#endif
-
-__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_FunctionPrototypes
-  * @{
-  */
-
-static void SetSysClock(void);
-
-#ifdef SYSCLK_FREQ_HSE
-  static void SetSysClockToHSE(void);
-#elif defined SYSCLK_FREQ_24MHz
-  static void SetSysClockTo24(void);
-#elif defined SYSCLK_FREQ_36MHz
-  static void SetSysClockTo36(void);
-#elif defined SYSCLK_FREQ_48MHz
-  static void SetSysClockTo48(void);
-#elif defined SYSCLK_FREQ_56MHz
-  static void SetSysClockTo56(void);  
-#elif defined SYSCLK_FREQ_72MHz
-  static void SetSysClockTo72(void);
-#endif
-
-#ifdef DATA_IN_ExtSRAM
-  static void SystemInit_ExtMemCtl(void); 
-#endif /* DATA_IN_ExtSRAM */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system
-  *         Initialize the Embedded Flash Interface, the PLL and update the 
-  *         SystemCoreClock variable.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-void SystemInit (void)
-{
-  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
-  /* Set HSION bit */
-  RCC->CR |= (uint32_t)0x00000001;
-
-  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
-#ifndef STM32F10X_CL
-  RCC->CFGR &= (uint32_t)0xF8FF0000;
-#else
-  RCC->CFGR &= (uint32_t)0xF0FF0000;
-#endif /* STM32F10X_CL */   
-  
-  /* Reset HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFFF;
-
-  /* Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFF;
-
-  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
-  RCC->CFGR &= (uint32_t)0xFF80FFFF;
-
-#ifdef STM32F10X_CL
-  /* Reset PLL2ON and PLL3ON bits */
-  RCC->CR &= (uint32_t)0xEBFFFFFF;
-
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x00FF0000;
-
-  /* Reset CFGR2 register */
-  RCC->CFGR2 = 0x00000000;
-#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x009F0000;
-
-  /* Reset CFGR2 register */
-  RCC->CFGR2 = 0x00000000;      
-#else
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x009F0000;
-#endif /* STM32F10X_CL */
-    
-#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
-  #ifdef DATA_IN_ExtSRAM
-    SystemInit_ExtMemCtl(); 
-  #endif /* DATA_IN_ExtSRAM */
-#endif 
-
-  /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
-  /* Configure the Flash Latency cycles and enable prefetch buffer */
-  SetSysClock();
-
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
-#endif 
-}
-
-/**
-  * @brief  Update SystemCoreClock variable according to Clock Register Values.
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
-  *             or HSI_VALUE(*) multiplied by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
-  *             8 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
-  *              8 MHz or 25 MHz, depedning on the product used), user has to ensure
-  *              that HSE_VALUE is same as the real frequency of the crystal used.
-  *              Otherwise, this function may have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate (void)
-{
-  uint32_t tmp = 0, pllmull = 0, pllsource = 0;
-
-#ifdef  STM32F10X_CL
-  uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
-#endif /* STM32F10X_CL */
-
-#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-  uint32_t prediv1factor = 0;
-#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */
-    
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-  
-  switch (tmp)
-  {
-    case 0x00:  /* HSI used as system clock */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x04:  /* HSE used as system clock */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x08:  /* PLL used as system clock */
-
-      /* Get PLL clock source and multiplication factor ----------------------*/
-      pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
-      
-#ifndef STM32F10X_CL      
-      pllmull = ( pllmull >> 18) + 2;
-      
-      if (pllsource == 0x00)
-      {
-        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
-        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
-      }
-      else
-      {
- #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-       prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
-       /* HSE oscillator clock selected as PREDIV1 clock entry */
-       SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 
- #else
-        /* HSE selected as PLL clock entry */
-        if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
-        {/* HSE oscillator clock divided by 2 */
-          SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
-        }
-        else
-        {
-          SystemCoreClock = HSE_VALUE * pllmull;
-        }
- #endif
-      }
-#else
-      pllmull = pllmull >> 18;
-      
-      if (pllmull != 0x0D)
-      {
-         pllmull += 2;
-      }
-      else
-      { /* PLL multiplication factor = PLL input clock * 6.5 */
-        pllmull = 13 / 2; 
-      }
-            
-      if (pllsource == 0x00)
-      {
-        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
-        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
-      }
-      else
-      {/* PREDIV1 selected as PLL clock entry */
-        
-        /* Get PREDIV1 clock source and division factor */
-        prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
-        prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
-        
-        if (prediv1source == 0)
-        { 
-          /* HSE oscillator clock selected as PREDIV1 clock entry */
-          SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;          
-        }
-        else
-        {/* PLL2 clock selected as PREDIV1 clock entry */
-          
-          /* Get PREDIV2 division factor and PLL2 multiplication factor */
-          prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
-          pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; 
-          SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                         
-        }
-      }
-#endif /* STM32F10X_CL */ 
-      break;
-
-    default:
-      SystemCoreClock = HSI_VALUE;
-      break;
-  }
-  
-  /* Compute HCLK clock frequency ----------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;  
-}
-
-/**
-  * @brief  Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClock(void)
-{
-#ifdef SYSCLK_FREQ_HSE
-  SetSysClockToHSE();
-#elif defined SYSCLK_FREQ_24MHz
-  SetSysClockTo24();
-#elif defined SYSCLK_FREQ_36MHz
-  SetSysClockTo36();
-#elif defined SYSCLK_FREQ_48MHz
-  SetSysClockTo48();
-#elif defined SYSCLK_FREQ_56MHz
-  SetSysClockTo56();  
-#elif defined SYSCLK_FREQ_72MHz
-  SetSysClockTo72();
-#endif
- 
- /* If none of the define above is enabled, the HSI is used as System clock
-    source (default after reset) */ 
-}
-
-/**
-  * @brief  Setup the external memory controller. Called in startup_stm32f10x.s 
-  *          before jump to __main
-  * @param  None
-  * @retval None
-  */ 
-#ifdef DATA_IN_ExtSRAM
-/**
-  * @brief  Setup the external memory controller. 
-  *         Called in startup_stm32f10x_xx.s/.c before jump to main.
-  * 	      This function configures the external SRAM mounted on STM3210E-EVAL
-  *         board (STM32 High density devices). This SRAM will be used as program
-  *         data memory (including heap and stack).
-  * @param  None
-  * @retval None
-  */ 
-void SystemInit_ExtMemCtl(void) 
-{
-/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
-  required, then adjust the Register Addresses */
-
-  /* Enable FSMC clock */
-  RCC->AHBENR = 0x00000114;
-  
-  /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */  
-  RCC->APB2ENR = 0x000001E0;
-  
-/* ---------------  SRAM Data lines, NOE and NWE configuration ---------------*/
-/*----------------  SRAM Address lines configuration -------------------------*/
-/*----------------  NOE and NWE configuration --------------------------------*/  
-/*----------------  NE3 configuration ----------------------------------------*/
-/*----------------  NBL0, NBL1 configuration ---------------------------------*/
-  
-  GPIOD->CRL = 0x44BB44BB;  
-  GPIOD->CRH = 0xBBBBBBBB;
-
-  GPIOE->CRL = 0xB44444BB;  
-  GPIOE->CRH = 0xBBBBBBBB;
-
-  GPIOF->CRL = 0x44BBBBBB;  
-  GPIOF->CRH = 0xBBBB4444;
-
-  GPIOG->CRL = 0x44BBBBBB;  
-  GPIOG->CRH = 0x44444B44;
-   
-/*----------------  FSMC Configuration ---------------------------------------*/  
-/*----------------  Enable FSMC Bank1_SRAM Bank ------------------------------*/
-  
-  FSMC_Bank1->BTCR[4] = 0x00001011;
-  FSMC_Bank1->BTCR[5] = 0x00000200;
-}
-#endif /* DATA_IN_ExtSRAM */
-
-#ifdef SYSCLK_FREQ_HSE
-/**
-  * @brief  Selects HSE as System clock source and configure HCLK, PCLK2
-  *          and PCLK1 prescalers.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockToHSE(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-
-#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 0 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-
-#ifndef STM32F10X_CL
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
-#else
-    if (HSE_VALUE <= 24000000)
-	{
-      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
-	}
-	else
-	{
-      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
-	}
-#endif /* STM32F10X_CL */
-#endif
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-    /* Select HSE as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;    
-
-    /* Wait till HSE is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  }  
-}
-#elif defined SYSCLK_FREQ_24MHz
-/**
-  * @brief  Sets System clock frequency to 24MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo24(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL 
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 0 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
-#endif
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL6); 
-
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */       
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }   
-#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
-    /*  PLL configuration:  = (HSE / 2) * 6 = 24 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6);
-#else    
-    /*  PLL configuration:  = (HSE / 2) * 6 = 24 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-#elif defined SYSCLK_FREQ_36MHz
-/**
-  * @brief  Sets System clock frequency to 36MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo36(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 1 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    
-    /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL9); 
-
-	/*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-#else    
-    /*  PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-#elif defined SYSCLK_FREQ_48MHz
-/**
-  * @brief  Sets System clock frequency to 48MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo48(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 1 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL6); 
-#else    
-    /*  PLL configuration: PLLCLK = HSE * 6 = 48 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-
-#elif defined SYSCLK_FREQ_56MHz
-/**
-  * @brief  Sets System clock frequency to 56MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo56(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/   
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 2 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL7); 
-#else     
-    /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7);
-
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-
-#elif defined SYSCLK_FREQ_72MHz
-/**
-  * @brief  Sets System clock frequency to 72MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo72(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 2 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
-
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL9); 
-#else    
-    /*  PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
-                                        RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-    
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  }
-}
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */    
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/readme.txt b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/readme.txt
deleted file mode 100644
index 082a709..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/readme.txt
+++ /dev/null
@@ -1,158 +0,0 @@
-/**
-  @page NVIC_IRQ_Mask NVIC IRQ Mask example
-  
-  @verbatim
-  ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
-  * @file    NVIC/IRQ_Mask/readme.txt 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Description of the NVIC IRQ Mask example.
-  ******************************************************************************
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  ******************************************************************************
-   @endverbatim
-
-@par Example Description 
-
-This example demontrates the use of the Nested Vectored Interrupt Controller (NVIC)
-IRQ Channels configuration and how to mask/activate different IRQs: 
-
-- Configuration of 3 TIM (TIM2..TIM4)timers to generate an interrupt on each 
-  counter update event.
-
-- The three timers are linked to their correspondant Update IRQ channel.
-
-- Assignment of a ascendant IRQ priority for each IRQ channel :
-     - TIM2 has a preemption priority of 0
-     - TIM3 has a preemption priority of 1
-     - TIM4 has a preemption priority of 2
-- In each interrupt routine: 
-   - TIM2 toggles a LED1 each 1s 
-   - TIM3 toggles a LED2 each 2s 
-   - TIM4 toggles a LED3 each 3s 
-
-- The KEY and WAKEUP buttons are used to boost the execution priority as follows:
-
-  - The KEY button is used in GPIO mode and at each KEY button press, the execution 
-    priority is raised to 0 and turn LED4 ON. This prevents all exceptions with 
-    configurable priority from activating, other than through the HardFault fault 
-    escalation mechanism. As consequence, all LEDs stop toggling as TIM2, TIM3 
-    and TIM4 IRQs are prevented from activation. 
-    
-    Pressing again the KEY button will release the priority boosting, turn LED4 
-    OFF and will allow all exceptions with configurable priority to be activated 
-    and TIM2, TIM3 and TIM4 can be generated again and the LEDs restart toggling.
-    
-    This execution priority is made using the CMSIS functions "__disable_irq()" 
-    and "__enable_irq()". 
-    These two functions are managing the Cortex-M3 PRIMASK special register.
-
-  - The WAKEUP button is used in EXTI mode and at each WAKEUP button press, the execution 
-    priority is masked to 0x40 using the BASEPRI register. 
-    A non-zero value will act as a priority mask, affecting the execution priority 
-    when the priority defined by BASEPRI is the same or higher than the current 
-    executing priority. 
-    As consequence, LED2 and LED3 stop toggling as TIM3 and TIM4 IRQs are 
-    prevented from activation. 
-    Pressing again the WAKEUP button will configure the BASEPRI register to 0, 
-    thus it has no effect on the current priority and TIM3 and TIM4 can be 
-    generated again and LED2 and LED3 restart toggling.
-    
-    This execution priority is made using the CMSIS functions "__set_BASEPRI()". 
-    This function is managing the Cortex-M3 BASEPRI special register.
-    Setting the BASEPRI register has no effect when the execution priority is
-    raised to 0 using the "__disable_irq()" function.
-
-@note These mechanisms only affect the group priority. They have no effect on 
-      the sub-priority. The sub-priority is only used to sort pending exception 
-      priorities, and does not affect active exceptions.
-
-@par Directory contents 
-
-  - NVIC/IRQ_Mask/stm32f10x_conf.h    Library Configuration file
-  - NVIC/IRQ_Mask/stm32f10x_it.c      Interrupt handlers
-  - NVIC/IRQ_Mask/stm32f10x_it.h      Interrupt handlers header file
-  - NVIC/IRQ_Mask/main.c              Main program
-  - NVIC/IRQ_Mask/system_stm32f10x.c  STM32F10x system source file
-  
-@par Hardware and Software environment 
-
-  - This example runs on STM32F10x Connectivity line, High-Density, High-Density 
-    Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density 
-    and Low-Density Value line Devices.
-  
-  - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density 
-    Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), 
-    STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) 
-    evaluation boards and can be easily tailored to any other supported device 
-    and development board.
-    To select the STMicroelectronics evaluation board used to run the example, 
-    uncomment the corresponding line in stm32_eval.h file (under Utilities\STM32_EVAL)
-
-  - STM32100E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PF.06, PF.07
-      PF.08 and PF.09
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8). 
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0). 
-    @note  the jumper JP4 must be not fit to be able to use the Wakeup push-button    
-            
-  - STM32100B-EVAL Set-up  
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PC.06, PC.07,
-      PC.08 and PC.09
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).    
-        
-  - STM3210C-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PD.07, PD.13, PF.03
-      and PD.04 pins
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).         
-    @note  Make sure that the Jumper 14 is in position 2<->3.
-              
-  - STM3210E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PF.06, PF.07
-      PF.08 and PF.09
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8).   
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).
-    @note  the jumper JP4 must be not fit to be able to use the Wakeup push-button          
-
-  - STM3210B-EVAL Set-up  
-    - Use LED1, LED2, LED3 and LED4 leds connected respectively to PC.06, PC.07,
-      PC.08 and PC.09
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).   
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).       
-	
-@par How to use it ? 
-
-In order to make the program work, you must do the following :
- - Copy all source files from this example folder to the template folder under
-   Project\STM32F10x_StdPeriph_Template
- - Open your preferred toolchain 
- - Rebuild all files and load your image into target memory
- - Run the example 
-
-@note
- - Low-density Value line devices are STM32F100xx microcontrollers where the 
-   Flash memory density ranges between 16 and 32 Kbytes.
- - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
- - Medium-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 64 and 128 Kbytes.  
- - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
- - High-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 512 and 1024 Kbytes.
- - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
-    
- * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
- */
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/stm32f10x_conf.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/stm32f10x_conf.h
deleted file mode 100644
index fc54fb1..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/stm32f10x_conf.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/IRQ_Mask/stm32f10x_conf.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Library configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CONF_H
-#define __STM32F10x_CONF_H
-
-/* Includes ------------------------------------------------------------------*/
-/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
-#include "stm32f10x_adc.h"
-#include "stm32f10x_bkp.h"
-#include "stm32f10x_can.h"
-#include "stm32f10x_cec.h"
-#include "stm32f10x_crc.h"
-#include "stm32f10x_dac.h"
-#include "stm32f10x_dbgmcu.h"
-#include "stm32f10x_dma.h"
-#include "stm32f10x_exti.h"
-#include "stm32f10x_flash.h"
-#include "stm32f10x_fsmc.h"
-#include "stm32f10x_gpio.h"
-#include "stm32f10x_i2c.h"
-#include "stm32f10x_iwdg.h"
-#include "stm32f10x_pwr.h"
-#include "stm32f10x_rcc.h"
-#include "stm32f10x_rtc.h"
-#include "stm32f10x_sdio.h"
-#include "stm32f10x_spi.h"
-#include "stm32f10x_tim.h"
-#include "stm32f10x_usart.h"
-#include "stm32f10x_wwdg.h"
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Uncomment the line below to expanse the "assert_param" macro in the 
-   Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function which reports 
-  *         the name of the source file and the source line number of the call 
-  *         that failed. If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#endif /* __STM32F10x_CONF_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/system_stm32f10x.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/system_stm32f10x.c
deleted file mode 100644
index 67293b9..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Mask/system_stm32f10x.c
+++ /dev/null
@@ -1,1094 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/IRQ_Mask/system_stm32f10x.c
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
-  * 
-  * 1.  This file provides two functions and one global variable to be called from 
-  *     user application:
-  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
-  *                      factors, AHB/APBx prescalers and Flash settings). 
-  *                      This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32f10x_xx.s" file.
-  *
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.
-  *
-  * 2. After each device reset the HSI (8 MHz) is used as system clock source.
-  *    Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to
-  *    configure the system clock before to branch to main program.
-  *
-  * 3. If the system clock source selected by user fails to startup, the SystemInit()
-  *    function will do nothing and HSI still used as system clock source. User can 
-  *    add some code to deal with this issue inside the SetSysClock() function.
-  *
-  * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on
-  *    the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. 
-  *    When HSE is used as system clock source, directly or through PLL, and you
-  *    are using different crystal you have to adapt the HSE value to your own
-  *    configuration.
-  *        
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32f10x_system
-  * @{
-  */  
-  
-/** @addtogroup STM32F10x_System_Private_Includes
-  * @{
-  */
-
-#include "stm32f10x.h"
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Defines
-  * @{
-  */
-
-/*!< Uncomment the line corresponding to the desired System clock (SYSCLK)
-   frequency (after reset the HSI is used as SYSCLK source)
-   
-   IMPORTANT NOTE:
-   ============== 
-   1. After each device reset the HSI is used as System clock source.
-
-   2. Please make sure that the selected System clock doesn't exceed your device's
-      maximum frequency.
-      
-   3. If none of the define below is enabled, the HSI is used as System clock
-    source.
-
-   4. The System clock configuration functions provided within this file assume that:
-        - For Low, Medium and High density Value line devices an external 8MHz 
-          crystal is used to drive the System clock.
-        - For Low, Medium and High density devices an external 8MHz crystal is
-          used to drive the System clock.
-        - For Connectivity line devices an external 25MHz crystal is used to drive
-          the System clock.
-     If you are using different crystal you have to adapt those functions accordingly.
-    */
-    
-#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
- #define SYSCLK_FREQ_24MHz  24000000
-#else
-/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
-/* #define SYSCLK_FREQ_24MHz  24000000 */ 
-/* #define SYSCLK_FREQ_36MHz  36000000 */
-/* #define SYSCLK_FREQ_48MHz  48000000 */
-/* #define SYSCLK_FREQ_56MHz  56000000 */
-#define SYSCLK_FREQ_72MHz  72000000
-#endif
-
-/*!< Uncomment the following line if you need to use external SRAM mounted
-     on STM3210E-EVAL board (STM32 High density and XL-density devices) or on 
-     STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ 
-#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
-/* #define DATA_IN_ExtSRAM */
-#endif
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */ 
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
-                                  This value must be a multiple of 0x200. */
-
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Variables
-  * @{
-  */
-
-/*******************************************************************************
-*  Clock Definitions
-*******************************************************************************/
-#ifdef SYSCLK_FREQ_HSE
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_HSE;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_24MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_24MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_36MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_36MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_48MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_48MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_56MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_56MHz;        /*!< System Clock Frequency (Core Clock) */
-#elif defined SYSCLK_FREQ_72MHz
-  uint32_t SystemCoreClock         = SYSCLK_FREQ_72MHz;        /*!< System Clock Frequency (Core Clock) */
-#else /*!< HSI Selected as System Clock source */
-  uint32_t SystemCoreClock         = HSI_VALUE;        /*!< System Clock Frequency (Core Clock) */
-#endif
-
-__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_FunctionPrototypes
-  * @{
-  */
-
-static void SetSysClock(void);
-
-#ifdef SYSCLK_FREQ_HSE
-  static void SetSysClockToHSE(void);
-#elif defined SYSCLK_FREQ_24MHz
-  static void SetSysClockTo24(void);
-#elif defined SYSCLK_FREQ_36MHz
-  static void SetSysClockTo36(void);
-#elif defined SYSCLK_FREQ_48MHz
-  static void SetSysClockTo48(void);
-#elif defined SYSCLK_FREQ_56MHz
-  static void SetSysClockTo56(void);  
-#elif defined SYSCLK_FREQ_72MHz
-  static void SetSysClockTo72(void);
-#endif
-
-#ifdef DATA_IN_ExtSRAM
-  static void SystemInit_ExtMemCtl(void); 
-#endif /* DATA_IN_ExtSRAM */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32F10x_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system
-  *         Initialize the Embedded Flash Interface, the PLL and update the 
-  *         SystemCoreClock variable.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-void SystemInit (void)
-{
-  /* Reset the RCC clock configuration to the default reset state(for debug purpose) */
-  /* Set HSION bit */
-  RCC->CR |= (uint32_t)0x00000001;
-
-  /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
-#ifndef STM32F10X_CL
-  RCC->CFGR &= (uint32_t)0xF8FF0000;
-#else
-  RCC->CFGR &= (uint32_t)0xF0FF0000;
-#endif /* STM32F10X_CL */   
-  
-  /* Reset HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xFEF6FFFF;
-
-  /* Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFF;
-
-  /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
-  RCC->CFGR &= (uint32_t)0xFF80FFFF;
-
-#ifdef STM32F10X_CL
-  /* Reset PLL2ON and PLL3ON bits */
-  RCC->CR &= (uint32_t)0xEBFFFFFF;
-
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x00FF0000;
-
-  /* Reset CFGR2 register */
-  RCC->CFGR2 = 0x00000000;
-#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x009F0000;
-
-  /* Reset CFGR2 register */
-  RCC->CFGR2 = 0x00000000;      
-#else
-  /* Disable all interrupts and clear pending bits  */
-  RCC->CIR = 0x009F0000;
-#endif /* STM32F10X_CL */
-    
-#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL)
-  #ifdef DATA_IN_ExtSRAM
-    SystemInit_ExtMemCtl(); 
-  #endif /* DATA_IN_ExtSRAM */
-#endif 
-
-  /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
-  /* Configure the Flash Latency cycles and enable prefetch buffer */
-  SetSysClock();
-
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
-#endif 
-}
-
-/**
-  * @brief  Update SystemCoreClock variable according to Clock Register Values.
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
-  *             or HSI_VALUE(*) multiplied by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
-  *             8 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
-  *              8 MHz or 25 MHz, depedning on the product used), user has to ensure
-  *              that HSE_VALUE is same as the real frequency of the crystal used.
-  *              Otherwise, this function may have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate (void)
-{
-  uint32_t tmp = 0, pllmull = 0, pllsource = 0;
-
-#ifdef  STM32F10X_CL
-  uint32_t prediv1source = 0, prediv1factor = 0, prediv2factor = 0, pll2mull = 0;
-#endif /* STM32F10X_CL */
-
-#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-  uint32_t prediv1factor = 0;
-#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */
-    
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-  
-  switch (tmp)
-  {
-    case 0x00:  /* HSI used as system clock */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x04:  /* HSE used as system clock */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x08:  /* PLL used as system clock */
-
-      /* Get PLL clock source and multiplication factor ----------------------*/
-      pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
-      
-#ifndef STM32F10X_CL      
-      pllmull = ( pllmull >> 18) + 2;
-      
-      if (pllsource == 0x00)
-      {
-        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
-        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
-      }
-      else
-      {
- #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL)
-       prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
-       /* HSE oscillator clock selected as PREDIV1 clock entry */
-       SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; 
- #else
-        /* HSE selected as PLL clock entry */
-        if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
-        {/* HSE oscillator clock divided by 2 */
-          SystemCoreClock = (HSE_VALUE >> 1) * pllmull;
-        }
-        else
-        {
-          SystemCoreClock = HSE_VALUE * pllmull;
-        }
- #endif
-      }
-#else
-      pllmull = pllmull >> 18;
-      
-      if (pllmull != 0x0D)
-      {
-         pllmull += 2;
-      }
-      else
-      { /* PLL multiplication factor = PLL input clock * 6.5 */
-        pllmull = 13 / 2; 
-      }
-            
-      if (pllsource == 0x00)
-      {
-        /* HSI oscillator clock divided by 2 selected as PLL clock entry */
-        SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
-      }
-      else
-      {/* PREDIV1 selected as PLL clock entry */
-        
-        /* Get PREDIV1 clock source and division factor */
-        prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
-        prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
-        
-        if (prediv1source == 0)
-        { 
-          /* HSE oscillator clock selected as PREDIV1 clock entry */
-          SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;          
-        }
-        else
-        {/* PLL2 clock selected as PREDIV1 clock entry */
-          
-          /* Get PREDIV2 division factor and PLL2 multiplication factor */
-          prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4) + 1;
-          pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8 ) + 2; 
-          SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;                         
-        }
-      }
-#endif /* STM32F10X_CL */ 
-      break;
-
-    default:
-      SystemCoreClock = HSI_VALUE;
-      break;
-  }
-  
-  /* Compute HCLK clock frequency ----------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;  
-}
-
-/**
-  * @brief  Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClock(void)
-{
-#ifdef SYSCLK_FREQ_HSE
-  SetSysClockToHSE();
-#elif defined SYSCLK_FREQ_24MHz
-  SetSysClockTo24();
-#elif defined SYSCLK_FREQ_36MHz
-  SetSysClockTo36();
-#elif defined SYSCLK_FREQ_48MHz
-  SetSysClockTo48();
-#elif defined SYSCLK_FREQ_56MHz
-  SetSysClockTo56();  
-#elif defined SYSCLK_FREQ_72MHz
-  SetSysClockTo72();
-#endif
- 
- /* If none of the define above is enabled, the HSI is used as System clock
-    source (default after reset) */ 
-}
-
-/**
-  * @brief  Setup the external memory controller. Called in startup_stm32f10x.s 
-  *          before jump to __main
-  * @param  None
-  * @retval None
-  */ 
-#ifdef DATA_IN_ExtSRAM
-/**
-  * @brief  Setup the external memory controller. 
-  *         Called in startup_stm32f10x_xx.s/.c before jump to main.
-  * 	      This function configures the external SRAM mounted on STM3210E-EVAL
-  *         board (STM32 High density devices). This SRAM will be used as program
-  *         data memory (including heap and stack).
-  * @param  None
-  * @retval None
-  */ 
-void SystemInit_ExtMemCtl(void) 
-{
-/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is 
-  required, then adjust the Register Addresses */
-
-  /* Enable FSMC clock */
-  RCC->AHBENR = 0x00000114;
-  
-  /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */  
-  RCC->APB2ENR = 0x000001E0;
-  
-/* ---------------  SRAM Data lines, NOE and NWE configuration ---------------*/
-/*----------------  SRAM Address lines configuration -------------------------*/
-/*----------------  NOE and NWE configuration --------------------------------*/  
-/*----------------  NE3 configuration ----------------------------------------*/
-/*----------------  NBL0, NBL1 configuration ---------------------------------*/
-  
-  GPIOD->CRL = 0x44BB44BB;  
-  GPIOD->CRH = 0xBBBBBBBB;
-
-  GPIOE->CRL = 0xB44444BB;  
-  GPIOE->CRH = 0xBBBBBBBB;
-
-  GPIOF->CRL = 0x44BBBBBB;  
-  GPIOF->CRH = 0xBBBB4444;
-
-  GPIOG->CRL = 0x44BBBBBB;  
-  GPIOG->CRH = 0x44444B44;
-   
-/*----------------  FSMC Configuration ---------------------------------------*/  
-/*----------------  Enable FSMC Bank1_SRAM Bank ------------------------------*/
-  
-  FSMC_Bank1->BTCR[4] = 0x00001011;
-  FSMC_Bank1->BTCR[5] = 0x00000200;
-}
-#endif /* DATA_IN_ExtSRAM */
-
-#ifdef SYSCLK_FREQ_HSE
-/**
-  * @brief  Selects HSE as System clock source and configure HCLK, PCLK2
-  *          and PCLK1 prescalers.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockToHSE(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-
-#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 0 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-
-#ifndef STM32F10X_CL
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
-#else
-    if (HSE_VALUE <= 24000000)
-	{
-      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;
-	}
-	else
-	{
-      FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;
-	}
-#endif /* STM32F10X_CL */
-#endif
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-    /* Select HSE as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE;    
-
-    /* Wait till HSE is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  }  
-}
-#elif defined SYSCLK_FREQ_24MHz
-/**
-  * @brief  Sets System clock frequency to 24MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers.
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo24(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL 
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 0 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0;    
-#endif
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL configuration: PLLCLK = PREDIV1 * 6 = 24 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL6); 
-
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */       
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }   
-#elif defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL)
-    /*  PLL configuration:  = (HSE / 2) * 6 = 24 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6);
-#else    
-    /*  PLL configuration:  = (HSE / 2) * 6 = 24 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-#elif defined SYSCLK_FREQ_36MHz
-/**
-  * @brief  Sets System clock frequency to 36MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo36(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 1 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    
-    /* PLL configuration: PLLCLK = PREDIV1 * 9 = 36 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL9); 
-
-	/*!< PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 10 = 4 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV10);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-#else    
-    /*  PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-#elif defined SYSCLK_FREQ_48MHz
-/**
-  * @brief  Sets System clock frequency to 48MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo48(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 1 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-    
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 6 = 48 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL6); 
-#else    
-    /*  PLL configuration: PLLCLK = HSE * 6 = 48 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-
-#elif defined SYSCLK_FREQ_56MHz
-/**
-  * @brief  Sets System clock frequency to 56MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo56(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/   
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 2 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 7 = 56 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL7); 
-#else     
-    /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7);
-
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  } 
-}
-
-#elif defined SYSCLK_FREQ_72MHz
-/**
-  * @brief  Sets System clock frequency to 72MHz and configure HCLK, PCLK2 
-  *          and PCLK1 prescalers. 
-  * @note   This function should be used only after reset.
-  * @param  None
-  * @retval None
-  */
-static void SetSysClockTo72(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/    
-  /* Enable HSE */    
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }  
-
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTBE;
-
-    /* Flash 2 wait state */
-    FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY);
-    FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2;    
-
- 
-    /* HCLK = SYSCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-      
-    /* PCLK2 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK */
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2;
-
-#ifdef STM32F10X_CL
-    /* Configure PLLs ------------------------------------------------------*/
-    /* PLL2 configuration: PLL2CLK = (HSE / 5) * 8 = 40 MHz */
-    /* PREDIV1 configuration: PREDIV1CLK = PLL2 / 5 = 8 MHz */
-        
-    RCC->CFGR2 &= (uint32_t)~(RCC_CFGR2_PREDIV2 | RCC_CFGR2_PLL2MUL |
-                              RCC_CFGR2_PREDIV1 | RCC_CFGR2_PREDIV1SRC);
-    RCC->CFGR2 |= (uint32_t)(RCC_CFGR2_PREDIV2_DIV5 | RCC_CFGR2_PLL2MUL8 |
-                             RCC_CFGR2_PREDIV1SRC_PLL2 | RCC_CFGR2_PREDIV1_DIV5);
-  
-    /* Enable PLL2 */
-    RCC->CR |= RCC_CR_PLL2ON;
-    /* Wait till PLL2 is ready */
-    while((RCC->CR & RCC_CR_PLL2RDY) == 0)
-    {
-    }
-    
-   
-    /* PLL configuration: PLLCLK = PREDIV1 * 9 = 72 MHz */ 
-    RCC->CFGR &= (uint32_t)~(RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL);
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLSRC_PREDIV1 | 
-                            RCC_CFGR_PLLMULL9); 
-#else    
-    /*  PLL configuration: PLLCLK = HSE * 9 = 72 MHz */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE |
-                                        RCC_CFGR_PLLMULL));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9);
-#endif /* STM32F10X_CL */
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-    
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;    
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
-    {
-    }
-  }
-  else
-  { /* If HSE fails to start-up, the application will have wrong clock 
-         configuration. User can add here some code to deal with this error */
-  }
-}
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */    
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/main.c
deleted file mode 100644
index 33b3007..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/main.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/IRQ_Priority/main.c 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Main program body
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-#include "stm32_eval.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Examples
-  * @{
-  */
-
-/** @addtogroup IRQ_Priority
-  * @{
-  */ 
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-__IO uint8_t PreemptionOccured = 0; 
-__IO uint8_t PreemptionPriorityValue = 0; 
-
-/* Private function prototypes -----------------------------------------------*/
-void NVIC_Config(void);
-void Delay(__IO uint32_t nCount);
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
-  * @brief  Main program.
-  * @param  None
-  * @retval None
-  */
-int main(void)
-{
-  /*!< At this stage the microcontroller clock setting is already configured, 
-       this is done through SystemInit() function which is called from startup
-       file (startup_stm32f10x_xx.s) before to branch to application main.
-       To reconfigure the default setting of SystemInit() function, refer to
-       system_stm32f10x.c file
-     */     
-       
-  /* NVIC configuration ------------------------------------------------------*/
-  NVIC_Config();     
-  
-  /* Initialize LED1..LED4, Key and Sel Joystick Buttons mounted on STM3210X-EVAL 
-     board */       
-  STM_EVAL_LEDInit(LED1);
-  STM_EVAL_LEDInit(LED2);
-  STM_EVAL_LEDInit(LED3);
-  STM_EVAL_LEDInit(LED4);
-  STM_EVAL_PBInit(BUTTON_KEY, BUTTON_MODE_EXTI);
-  STM_EVAL_PBInit(BUTTON_WAKEUP, BUTTON_MODE_EXTI); 
-
-  /* Configure the SysTick Handler Priority: Preemption priority and subpriority */
-  NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), !PreemptionPriorityValue, 0));
-
-  while (1)
-  {
-    if(PreemptionOccured != 0)
-    {
-      /* Toggel The lED1 */
-      STM_EVAL_LEDToggle(LED1);
-      
-      /* Insert delay Time */
-      Delay(0x5FFFF);
-      
-      STM_EVAL_LEDToggle(LED2);
-      
-      Delay(0x5FFFF);
-      
-      STM_EVAL_LEDToggle(LED3);
-      
-      Delay(0x5FFFF);
-      
-      STM_EVAL_LEDToggle(LED4);
-      
-      Delay(0x5FFFF); 
-    }
-  }
-}
-
-/**
-  * @brief  Configures the NVIC interrupts.
-  * @param  None
-  * @retval None
-  */
-void NVIC_Config(void)
-{
-  NVIC_InitTypeDef NVIC_InitStructure;
-
-  /* Configure the preemption priority and subpriority:
-     - 1 bits for pre-emption priority: possible value are 0 or 1 
-     - 3 bits for subpriority: possible value are 0..7
-     - Lower values gives higher priority  
-   */
-  NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
-  
-  /* Enable the WAKEUP_BUTTON_EXTI_IRQn Interrupt */
-  NVIC_InitStructure.NVIC_IRQChannel = WAKEUP_BUTTON_EXTI_IRQn;
-  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = PreemptionPriorityValue;
-  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-  NVIC_Init(&NVIC_InitStructure);
-  
-  /* Enable the KEY_BUTTON_EXTI_IRQn Interrupt */
-  NVIC_InitStructure.NVIC_IRQChannel = KEY_BUTTON_EXTI_IRQn;
-  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
-  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
-  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-  NVIC_Init(&NVIC_InitStructure);
-}
-
-/**
-  * @brief  Inserts a delay time.
-  * @param  nCount: specifies the delay time length.
-  * @retval None
-  */
-void Delay(__IO uint32_t nCount)
-{
-  for(; nCount != 0; nCount--);
-}
-
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(uint8_t* file, uint32_t line)
-{ 
-  /* User can add his own implementation to report the file name and line number,
-     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-
-  /* Infinite loop */
-  while (1)
-  {
-  }
-}
-
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/readme.txt b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/readme.txt
deleted file mode 100644
index cd86c9b..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/readme.txt
+++ /dev/null
@@ -1,144 +0,0 @@
-/**
-  @page NVIC_IRQ_Priority NVIC IRQ Priority example
-  
-  @verbatim
-  ******************** (C) COPYRIGHT 2011 STMicroelectronics *******************
-  * @file    NVIC/IRQ_Priority/readme.txt 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Description of the NVIC IRQ Priority example.
-  ******************************************************************************
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  ******************************************************************************
-   @endverbatim
-
-@par Example Description 
-
-This example demonstrates the use of the Nested Vectored Interrupt Controller (NVIC): 
-
-- Configuration of 2 EXTI Lines (Wakeup button EXTI Line & Key button EXTI Line)
-  to generate an interrupt on each falling edge and use the SysTick interrupt.
-- These interrupts are configured with the following parameters:
-    - Wakeup button EXTI Line:  
-        - PreemptionPriority = PreemptionPriorityValue
-        - SubPriority = 0
-    - Key button EXTI Line:    
-        - PreemptionPriority = 0
-        - SubPriority = 1           
-    - SysTick Handler:  
-        - PreemptionPriority = !PreemptionPriorityValue
-        - SubPriority = 0             
-First, the PreemptionPriorityValue is equal to 0, the Wakeup button EXTI Line 
-has higher preemption priority than the SysTick handler. 
-
-In the key button EXTI Line interrupt routine the Wakeup button EXTI Line and 
-SysTick preemption priorities are inverted. 
-In the Wakeup button EXTI Line interrupt routine the pending bit of the SysTick 
-interrupt is set this will cause SysTick ISR to preempt the Wakeup button EXTI 
-Line ISR only if it has higher preemption priority.
-
-The system behaves as following:
- 
-1) The first time Key button EXTI Line interrupt occurs the SysTick preemption 
-become higher than Wakeup button EXTI Line one. So when the Wakeup button EXTI 
-Line interrupt occurs, the SysTick ISR is executed and the PreemptionOccured 
-variable become TRUE and the four leds (LED1, LED2, LED3, LED4) start toggling.
-
-2) When the next Key button EXTI Line interrupt occurs the SysTick preemption
-become lower than Wakeup button EXTI Line one. So when the Wakeup button EXTI Line
-interrupt occurs, the PreemptionOccured variable became FALSE and the four leds
-(LED1, LED2, LED3, LED4) stop toggling.
-
-Then this behavior is repeated from point 1) in an infinite loop.
-
-
-@par Directory contents 
-
-  - NVIC/IRQ_Priority/stm32f10x_conf.h     Library Configuration file
-  - NVIC/IRQ_Priority/stm32f10x_it.c       Interrupt handlers
-  - NVIC/IRQ_Priority/stm32f10x_it.h       Interrupt handlers header file
-  - NVIC/IRQ_Priority/main.c               Main program
-  - NVIC/IRQ_Priority/system_stm32f10x.c   STM32F10x system source file
-
-@par Hardware and Software environment 
-
-  - This example runs on STM32F10x Connectivity line, High-Density, High-Density 
-    Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density 
-    and Low-Density Value line Devices.
-  
-  - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density 
-    Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), 
-    STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density)
-    evaluation boards and can be easily tailored to any other supported device 
-    and development board.
-    To select the STMicroelectronics evaluation board used to run the example, 
-    uncomment the corresponding line in stm32_eval.h file (under Utilities\STM32_EVAL)
-
-  - STM32100E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PF.06, PF0.7, PF.08 
-      and PF.09 pins
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).
-    @note  the jumper JP4 must be not fit to be able to use the Wakeup push-button
-        
-  - STM32100B-EVAL Set-up  
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PC.06, PC.07, PC.08
-      and PC.09 pins
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).  
-    
- - STM3210C-EVAL Set-up  
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PD.07, PD.13, PF.03
-      and PD.04 pins
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0). Make sure 
-      that the Jumper 14 is in position 2<->3.
-      
-  - STM3210E-EVAL Set-up 
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PF.06, PF0.7, PF.08 
-      and PF.09 pins
-    - Use the Key push-button connected to pin PG.08 (EXTI Line8).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).
-    @note  the jumper JP4 must be not fit to be able to use the Wakeup push-button
-    
-  - STM3210B-EVAL Set-up  
-    - Use LED1, LED2, LED3 and LED4 connected respectively to PC.06, PC.07, PC.08
-      and PC.09 pins
-    - Use the Key push-button connected to pin PB.09 (EXTI Line9).
-    - Use the Wakeup push-button connected to pin PA.00 (EXTI Line0).
-
-    
-@par How to use it ? 
-
-In order to make the program work, you must do the following :
- - Copy all source files from this example folder to the template folder under
-   Project\STM32F10x_StdPeriph_Template
- - Open your preferred toolchain 
- - Rebuild all files and load your image into target memory
- - Run the example 
-
-@note
- - Low-density Value line devices are STM32F100xx microcontrollers where the 
-   Flash memory density ranges between 16 and 32 Kbytes.
- - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
- - Medium-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 64 and 128 Kbytes.  
- - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx 
-   microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
- - High-density Value line devices are STM32F100xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - High-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 256 and 512 Kbytes.
- - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where
-   the Flash memory density ranges between 512 and 1024 Kbytes.
- - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
-    
- * <h3><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h3>
- */
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_conf.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_conf.h
deleted file mode 100644
index 0566ac2..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_conf.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/IRQ_Priority/stm32f10x_conf.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Library configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CONF_H
-#define __STM32F10x_CONF_H
-
-/* Includes ------------------------------------------------------------------*/
-/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
-#include "stm32f10x_adc.h"
-#include "stm32f10x_bkp.h"
-#include "stm32f10x_can.h"
-#include "stm32f10x_cec.h"
-#include "stm32f10x_crc.h"
-#include "stm32f10x_dac.h"
-#include "stm32f10x_dbgmcu.h"
-#include "stm32f10x_dma.h"
-#include "stm32f10x_exti.h"
-#include "stm32f10x_flash.h"
-#include "stm32f10x_fsmc.h"
-#include "stm32f10x_gpio.h"
-#include "stm32f10x_i2c.h"
-#include "stm32f10x_iwdg.h"
-#include "stm32f10x_pwr.h"
-#include "stm32f10x_rcc.h"
-#include "stm32f10x_rtc.h"
-#include "stm32f10x_sdio.h"
-#include "stm32f10x_spi.h"
-#include "stm32f10x_tim.h"
-#include "stm32f10x_usart.h"
-#include "stm32f10x_wwdg.h"
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Uncomment the line below to expanse the "assert_param" macro in the 
-   Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function which reports 
-  *         the name of the source file and the source line number of the call 
-  *         that failed. If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#endif /* __STM32F10x_CONF_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_it.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_it.h
deleted file mode 100644
index a3a3aff..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/IRQ_Priority/stm32f10x_it.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/IRQ_Priority/stm32f10x_it.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   This file contains the headers of the interrupt handlers.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_IT_H
-#define __STM32F10x_IT_H
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-void EXTI0_IRQHandler(void);
-void EXTI9_5_IRQHandler(void);
-
-#endif /* __STM32F10x_IT_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/EWARM/stm32f10x_flash_offset.icf b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/EWARM/stm32f10x_flash_offset.icf
deleted file mode 100644
index 1efdb2b..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/EWARM/stm32f10x_flash_offset.icf
+++ /dev/null
@@ -1,31 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08003000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__   = 0x08003000 ;
-define symbol __ICFEDIT_region_ROM_end__     = 0x080FFFFF;
-define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__     = 0x20017FFF;
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__   = 0x400;
-define symbol __ICFEDIT_size_heap__     = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/STM32F10x_offset.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/STM32F10x_offset.lsl
deleted file mode 100644
index a3adbc0..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/STM32F10x_offset.lsl
+++ /dev/null
@@ -1,155 +0,0 @@
-////////////////////////////////////////////////////////////////////////////
-//
-//  File        :  stm32f103_cmsis.lsl
-//
-//  Version     :  @(#)stm32f103_cmsis.lsl      1.2  09/06/04
-//
-//  Description :  LSL file for the STMicroelectronics STM32F103, CMSIS version
-//
-//  Copyright 2009 Altium BV     
-//
-//  NOTE:
-//      This file is derived from cm3.lsl and stm32f103.lsl.
-//      It is assumed that the user works with the ARMv7M architecture.
-//      Other architectures will not work with this lsl file.
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-// We do not want the vectors as defined in arm_arch.lsl
-//
-#define __NO_DEFAULT_AUTO_VECTORS       1
-#define __NR_OF_VECTORS                 76
-
-
-#ifndef __STACK
-#  define __STACK                       8k
-#endif
-#ifndef __HEAP
-#  define __HEAP                        2k
-#endif
-#ifndef __VECTOR_TABLE_ROM_ADDR
-#  define __VECTOR_TABLE_ROM_ADDR       0x08003000
-#endif
-#ifndef __XVWBUF
-#define __XVWBUF                        256             /* buffer used by CrossView */
-#endif
-
-#include <arm_arch.lsl>
-
-////////////////////////////////////////////////////////////////////////////
-//
-// In the STM32F10x, 3 different boot modes can be selected
-// - User Flash memory is selected as boot space
-// - SystemMemory is selected as boot space
-// - Embedded SRAM is selected as boot space
-//
-// This aliases the physical memory associated with each boot mode to Block
-// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
-// the related memory (Flash memory or SRAM) is still accessible at its
-// original memory space.
-//
-// If no memory is defined yet use the following memory settings
-//
-#ifndef __MEMORY
-
-memory stm32f103flash
-{
-    mau = 8;
-    type = rom;
-    size = 120k;
-    map ( size = 120k, dest_offset=0x08003000, dest=bus:ARM:local_bus);
-}
-
-memory stm32f103ram
-{
-    mau = 8;
-    type = ram;
-    size = 8k;
-    map ( size = 8k, dest_offset=0x20000000, dest=bus:ARM:local_bus);
-}
-
-#endif /* __MEMORY */
-
-section_layout ::linear
-{
-	group( contiguous )
-	{
-		select ".bss.stack";
-		select "stack";
-	}
-}
-
-
-//
-// Custom vector table defines interrupts according to CMSIS standard
-//
-# if defined(__CPU_ARMV7M__)
-section_setup ::linear
-{
-                // vector table with handler addresses
-                vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR,
-                                              template = ".text.handler_address",
-                                              template_symbol = "_lc_vector_handler",
-                                              vector_prefix = "_vector_",
-                                              fill = loop,
-                                              no_inline
-                                            )
-                {
-                        vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work
-                        vector ( id = 1, fill = "_START" );
-                        vector ( id = 2, optional, fill = "NMI_Handler" );
-                        vector ( id = 3, optional, fill = "HardFault_Handler" );
-                        vector ( id = 4, optional, fill = "MemManage_Handler" );
-                        vector ( id = 5, optional, fill = "BusFault_Handler" );
-                        vector ( id = 6, optional, fill = "UsageFault_Handler" );
-                        vector ( id = 11, optional, fill = "SVC_Handler" );
-                        vector ( id = 12, optional, fill = "DebugMon_Handler" );
-                        vector ( id = 14, optional, fill = "PendSV_Handler" );
-                        vector ( id = 15, optional, fill = "SysTick_Handler" );
-
-                        // External Interrupts :
-                        vector ( id = 16, optional, fill = "WWDG_IRQHandler" );                 // Window Watchdog
-                        vector ( id = 17, optional, fill = "PVD_IRQHandler" );                  // PVD through EXTI Line detect
-                        vector ( id = 18, optional, fill = "TAMPER_IRQHandler" );               // Tamper
-                        vector ( id = 19, optional, fill = "RTC_IRQHandler" );                  // RTC
-                        vector ( id = 20, optional, fill = "FLASH_IRQHandler" );                // Flash
-                        vector ( id = 21, optional, fill = "RCC_IRQHandler" );                  // RCC
-                        vector ( id = 22, optional, fill = "EXTI0_IRQHandler" );                // EXTI Line 0
-                        vector ( id = 23, optional, fill = "EXTI1_IRQHandler" );                // EXTI Line 1
-                        vector ( id = 24, optional, fill = "EXTI2_IRQHandler" );                // EXTI Line 2
-                        vector ( id = 25, optional, fill = "EXTI3_IRQHandler" );                // EXTI Line 3
-                        vector ( id = 26, optional, fill = "EXTI4_IRQHandler" );                // EXTI Line 4
-                        vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" );        // DMA Channel 1
-                        vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" );        // DMA Channel 2
-                        vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" );        // DMA Channel 3
-                        vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" );        // DMA Channel 4
-                        vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" );        // DMA Channel 5
-                        vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" );        // DMA Channel 6
-                        vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" );        // DMA Channel 7
-                        vector ( id = 34, optional, fill = "ADC1_IRQHandler" );                 // ADC1                        
-                        vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" );              // EXTI Line 9..5
-                        vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" );       // TIM1 Break and TIM15
-                        vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" );       // TIM1 Update and TIM16
-                        vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" );   // TIM1 Trigger and Commutation and TIM17
-                        vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" );              // TIM1 Capture Compare
-                        vector ( id = 44, optional, fill = "TIM2_IRQHandler" );                 // TIM2
-                        vector ( id = 45, optional, fill = "TIM3_IRQHandler" );                 // TIM3
-                        vector ( id = 46, optional, fill = "TIM4_IRQHandler" );                 // TIM4
-                        vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" );              // I2C1 Event
-                        vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" );              // I2C1 Error
-                        vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" );              // I2C2 Event
-                        vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" );              // I2C2 Error
-                        vector ( id = 51, optional, fill = "SPI1_IRQHandler" );                 // SPI1
-                        vector ( id = 52, optional, fill = "SPI2_IRQHandler" );                 // SPI2
-                        vector ( id = 53, optional, fill = "USART1_IRQHandler" );               // USART1
-                        vector ( id = 54, optional, fill = "USART2_IRQHandler" );               // USART2
-                        vector ( id = 55, optional, fill = "USART3_IRQHandler" );               // USART3
-                        vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" );            // EXTI Line 15..10
-                        vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" );             // RTC Alarm through EXTI Line
-                        vector ( id = 58, optional, fill = "CEC_IRQHandler" );                  // HDMI-CEC                   
-                        vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" );             // TIM6 and DAC underrun
-                        vector ( id = 71, optional, fill = "TIM7_IRQHandler" );                 // TIM7
-                }
-}
-# endif
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/link_offset.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/link_offset.lnk
deleted file mode 100644
index 2d9c35c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100B-EVAL/link_offset.lnk
+++ /dev/null
@@ -1,4 +0,0 @@
--d"./settings/STM32F10x_offset.lsl"
---optimize=0
---map-file-format=2
-$(LinkObjects)
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/STM32F10x_offset.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/STM32F10x_offset.lsl
deleted file mode 100644
index c0c6865..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/STM32F10x_offset.lsl
+++ /dev/null
@@ -1,168 +0,0 @@
-////////////////////////////////////////////////////////////////////////////
-//
-//  File        :  stm32f103_cmsis.lsl
-//
-//  Version     :  @(#)stm32f103_cmsis.lsl      1.2  09/06/04
-//
-//  Description :  LSL file for the STMicroelectronics STM32F103, CMSIS version
-//
-//  Copyright 2009 Altium BV     
-//
-//  NOTE:
-//      This file is derived from cm3.lsl and stm32f103.lsl.
-//      It is assumed that the user works with the ARMv7M architecture.
-//      Other architectures will not work with this lsl file.
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-// We do not want the vectors as defined in arm_arch.lsl
-//
-#define __NO_DEFAULT_AUTO_VECTORS       1
-#define __NR_OF_VECTORS                 76
-
-
-#ifndef __STACK
-#  define __STACK                       8k
-#endif
-#ifndef __HEAP
-#  define __HEAP                        2k
-#endif
-#ifndef __VECTOR_TABLE_ROM_ADDR
-#  define __VECTOR_TABLE_ROM_ADDR       0x08003000
-#endif
-#ifndef __XVWBUF
-#define __XVWBUF                        256             /* buffer used by CrossView */
-#endif
-
-#include <arm_arch.lsl>
-
-////////////////////////////////////////////////////////////////////////////
-//
-// In the STM32F10x, 3 different boot modes can be selected
-// - User Flash memory is selected as boot space
-// - SystemMemory is selected as boot space
-// - Embedded SRAM is selected as boot space
-//
-// This aliases the physical memory associated with each boot mode to Block
-// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
-// the related memory (Flash memory or SRAM) is still accessible at its
-// original memory space.
-//
-// If no memory is defined yet use the following memory settings
-//
-#ifndef __MEMORY
-
-memory stm32f103flash
-{
-    mau = 8;
-    type = rom;
-    size = 504k;
-    map ( size = 504k, dest_offset=0x08003000, dest=bus:ARM:local_bus);
-}
-
-memory stm32f103ram
-{
-    mau = 8;
-    type = ram;
-    size = 32k;
-    map ( size = 32k, dest_offset=0x20000000, dest=bus:ARM:local_bus);
-}
-
-#endif /* __MEMORY */
-
-
-section_layout ::linear
-{
-	group( contiguous )
-	{
-		select ".bss.stack";
-		select "stack";
-	}
-}
-
-
-//
-// Custom vector table defines interrupts according to CMSIS standard
-//
-# if defined(__CPU_ARMV7M__)
-section_setup ::linear
-{
-                // vector table with handler addresses
-                vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR,
-                                              template = ".text.handler_address",
-                                              template_symbol = "_lc_vector_handler",
-                                              vector_prefix = "_vector_",
-                                              fill = loop,
-                                              no_inline
-                                            )
-                {
-                        vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work
-                        vector ( id = 1, fill = "_START" );
-                        vector ( id = 2, optional, fill = "NMI_Handler" );
-                        vector ( id = 3, optional, fill = "HardFault_Handler" );
-                        vector ( id = 4, optional, fill = "MemManage_Handler" );
-                        vector ( id = 5, optional, fill = "BusFault_Handler" );
-                        vector ( id = 6, optional, fill = "UsageFault_Handler" );
-                        vector ( id = 11, optional, fill = "SVC_Handler" );
-                        vector ( id = 12, optional, fill = "DebugMon_Handler" );
-                        vector ( id = 14, optional, fill = "PendSV_Handler" );
-                        vector ( id = 15, optional, fill = "SysTick_Handler" );
-
-                        // External Interrupts :
-                        vector ( id = 16, optional, fill = "WWDG_IRQHandler" );                 // Window Watchdog
-                        vector ( id = 17, optional, fill = "PVD_IRQHandler" );                  // PVD through EXTI Line detect
-                        vector ( id = 18, optional, fill = "TAMPER_IRQHandler" );               // Tamper
-                        vector ( id = 19, optional, fill = "RTC_IRQHandler" );                  // RTC
-                        vector ( id = 20, optional, fill = "FLASH_IRQHandler" );                // Flash
-                        vector ( id = 21, optional, fill = "RCC_IRQHandler" );                  // RCC
-                        vector ( id = 22, optional, fill = "EXTI0_IRQHandler" );                // EXTI Line 0
-                        vector ( id = 23, optional, fill = "EXTI1_IRQHandler" );                // EXTI Line 1
-                        vector ( id = 24, optional, fill = "EXTI2_IRQHandler" );                // EXTI Line 2
-                        vector ( id = 25, optional, fill = "EXTI3_IRQHandler" );                // EXTI Line 3
-                        vector ( id = 26, optional, fill = "EXTI4_IRQHandler" );                // EXTI Line 4
-                        vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" );          // DMA Channel 1
-                        vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" );          // DMA Channel 2
-                        vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" );          // DMA Channel 3
-                        vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" );          // DMA Channel 4
-                        vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" );          // DMA Channel 5
-                        vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" );          // DMA Channel 6
-                        vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" );          // DMA Channel 7
-                        vector ( id = 34, optional, fill = "ADC1_IRQHandler" );                   // ADC1 
-                        vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" );              // EXTI Line 9..5
-                        vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" );        // TIM1_BRK_TIM15_IRQHandler
-                        vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" );              // TIM1_UP_TIM16_IRQHandler
-                        vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" );         // TIM1_TRG_COM_TIM17_IRQHandler
-                        vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" );              // TIM1 Capture Compare
-                        vector ( id = 44, optional, fill = "TIM2_IRQHandler" );                 // TIM2
-                        vector ( id = 45, optional, fill = "TIM3_IRQHandler" );                 // TIM3
-                        vector ( id = 46, optional, fill = "TIM4_IRQHandler" );                 // TIM4
-                        vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" );              // I2C1 Event
-                        vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" );              // I2C1 Error
-                        vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" );              // I2C2 Event
-                        vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" );              // I2C2 Error
-                        vector ( id = 51, optional, fill = "SPI1_IRQHandler" );                 // SPI1
-                        vector ( id = 52, optional, fill = "SPI2_IRQHandler" );                 // SPI2
-                        vector ( id = 53, optional, fill = "USART1_IRQHandler" );               // USART1
-                        vector ( id = 54, optional, fill = "USART2_IRQHandler" );               // USART2
-                        vector ( id = 55, optional, fill = "USART3_IRQHandler" );               // USART3
-                        vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" );            // EXTI Line 15..10
-                        vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" );             // RTC Alarm through EXTI Line
-                        vector ( id = 58, optional, fill = "CEC_IRQHandler" );                 // CEC_IRQHandler
-                        vector ( id = 59, optional, fill = "TIM12_IRQHandler" );             // TIM12_IRQHandler
-                        vector ( id = 60, optional, fill = "TIM13_IRQHandler" );              // TIM13_IRQHandler
-                        vector ( id = 61, optional, fill = "TIM14_IRQHandler" );             // TIM14_IRQHandler
-                        vector ( id = 66, optional, fill = "TIM5_IRQHandler" );                 // TIM5
-                        vector ( id = 67, optional, fill = "SPI3_IRQHandler" );                 // SPI3
-                        vector ( id = 68, optional, fill = "UART4_IRQHandler" );                // UART4
-                        vector ( id = 69, optional, fill = "UART5_IRQHandler" );                // UART5
-                        vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" );                 // TIM6_DAC_IRQHandler
-                        vector ( id = 71, optional, fill = "TIM7_IRQHandler" );                 // TIM7
-                        vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" );        // DMA2 Channel1
-                        vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" );        // DMA2 Channel2
-                        vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" );        // DMA2 Channel3
-                        vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" );      // DMA2 Channel4 and DMA2 Channel5
-                        vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" );      // DMA2 Channel5
-                }
-}
-# endif
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/link_offset.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/link_offset.lnk
deleted file mode 100644
index 2d9c35c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32100E-EVAL/link_offset.lnk
+++ /dev/null
@@ -1,4 +0,0 @@
--d"./settings/STM32F10x_offset.lsl"
---optimize=0
---map-file-format=2
-$(LinkObjects)
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210B-EVAL/STM32F10x_offset.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210B-EVAL/STM32F10x_offset.lsl
deleted file mode 100644
index 7d95809..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210B-EVAL/STM32F10x_offset.lsl
+++ /dev/null
@@ -1,157 +0,0 @@
-////////////////////////////////////////////////////////////////////////////
-//
-//  File        :  stm32f103_cmsis.lsl
-//
-//  Version     :  @(#)stm32f103_cmsis.lsl      1.2  09/06/04
-//
-//  Description :  LSL file for the STMicroelectronics STM32F103, CMSIS version
-//
-//  Copyright 2009 Altium BV     
-//
-//  NOTE:
-//      This file is derived from cm3.lsl and stm32f103.lsl.
-//      It is assumed that the user works with the ARMv7M architecture.
-//      Other architectures will not work with this lsl file.
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-// We do not want the vectors as defined in arm_arch.lsl
-//
-#define __NO_DEFAULT_AUTO_VECTORS       1
-#define __NR_OF_VECTORS                 76
-
-
-#ifndef __STACK
-#  define __STACK                       8k
-#endif
-#ifndef __HEAP
-#  define __HEAP                        2k
-#endif
-#ifndef __VECTOR_TABLE_ROM_ADDR
-#  define __VECTOR_TABLE_ROM_ADDR       0x08003000
-#endif
-#ifndef __XVWBUF
-#define __XVWBUF                        256             /* buffer used by CrossView */
-#endif
-
-#include <arm_arch.lsl>
-
-////////////////////////////////////////////////////////////////////////////
-//
-// In the STM32F10x, 3 different boot modes can be selected
-// - User Flash memory is selected as boot space
-// - SystemMemory is selected as boot space
-// - Embedded SRAM is selected as boot space
-//
-// This aliases the physical memory associated with each boot mode to Block
-// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
-// the related memory (Flash memory or SRAM) is still accessible at its
-// original memory space.
-//
-// If no memory is defined yet use the following memory settings
-//
-#ifndef __MEMORY
-
-memory stm32f103flash
-{
-    mau = 8;
-    type = rom;
-    size = 120k;
-    map ( size = 120k, dest_offset=0x08003000, dest=bus:ARM:local_bus);
-}
-
-memory stm32f103ram
-{
-    mau = 8;
-    type = ram;
-    size = 20k;
-    map ( size = 20k, dest_offset=0x20000000, dest=bus:ARM:local_bus);
-}
-
-#endif /* __MEMORY */
-
-section_layout ::linear
-{
-	group( contiguous )
-	{
-		select ".bss.stack";
-		select "stack";
-	}
-}
-
-
-//
-// Custom vector table defines interrupts according to CMSIS standard
-//
-# if defined(__CPU_ARMV7M__)
-section_setup ::linear
-{
-                // vector table with handler addresses
-                vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR,
-                                              template = ".text.handler_address",
-                                              template_symbol = "_lc_vector_handler",
-                                              vector_prefix = "_vector_",
-                                              fill = loop,
-                                              no_inline
-                                            )
-                {
-                        vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work
-                        vector ( id = 1, fill = "_START" );
-                        vector ( id = 2, optional, fill = "NMI_Handler" );
-                        vector ( id = 3, optional, fill = "HardFault_Handler" );
-                        vector ( id = 4, optional, fill = "MemManage_Handler" );
-                        vector ( id = 5, optional, fill = "BusFault_Handler" );
-                        vector ( id = 6, optional, fill = "UsageFault_Handler" );
-                        vector ( id = 11, optional, fill = "SVC_Handler" );
-                        vector ( id = 12, optional, fill = "DebugMon_Handler" );
-                        vector ( id = 14, optional, fill = "PendSV_Handler" );
-                        vector ( id = 15, optional, fill = "SysTick_Handler" );
-
-                        // External Interrupts :
-                        vector ( id = 16, optional, fill = "WWDG_IRQHandler" );                 // Window Watchdog
-                        vector ( id = 17, optional, fill = "PVD_IRQHandler" );                  // PVD through EXTI Line detect
-                        vector ( id = 18, optional, fill = "TAMPER_IRQHandler" );               // Tamper
-                        vector ( id = 19, optional, fill = "RTC_IRQHandler" );                  // RTC
-                        vector ( id = 20, optional, fill = "FLASH_IRQHandler" );                // Flash
-                        vector ( id = 21, optional, fill = "RCC_IRQHandler" );                  // RCC
-                        vector ( id = 22, optional, fill = "EXTI0_IRQHandler" );                // EXTI Line 0
-                        vector ( id = 23, optional, fill = "EXTI1_IRQHandler" );                // EXTI Line 1
-                        vector ( id = 24, optional, fill = "EXTI2_IRQHandler" );                // EXTI Line 2
-                        vector ( id = 25, optional, fill = "EXTI3_IRQHandler" );                // EXTI Line 3
-                        vector ( id = 26, optional, fill = "EXTI4_IRQHandler" );                // EXTI Line 4
-                        vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" );          // DMA Channel 1
-                        vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" );          // DMA Channel 2
-                        vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" );          // DMA Channel 3
-                        vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" );          // DMA Channel 4
-                        vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" );          // DMA Channel 5
-                        vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" );          // DMA Channel 6
-                        vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" );          // DMA Channel 7
-                        vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" );               // ADC1 and ADC2
-                        vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" );       // USB High Priority or CAN1 TX
-                        vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" );       // USB LowPriority or CAN RX0
-                        vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" );              // CAN1 RX1
-                        vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" );              // CAN1 SCE
-                        vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" );              // EXTI Line 9..5
-                        vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" );             // TIM1 Break
-                        vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" );              // TIM1 Update
-                        vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" );         // TIM1 Trigger and Commutation
-                        vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" );              // TIM1 Capture Compare
-                        vector ( id = 44, optional, fill = "TIM2_IRQHandler" );                 // TIM2
-                        vector ( id = 45, optional, fill = "TIM3_IRQHandler" );                 // TIM3
-                        vector ( id = 46, optional, fill = "TIM4_IRQHandler" );                 // TIM4
-                        vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" );              // I2C1 Event
-                        vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" );              // I2C1 Error
-                        vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" );              // I2C2 Event
-                        vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" );              // I2C2 Error
-                        vector ( id = 51, optional, fill = "SPI1_IRQHandler" );                 // SPI1
-                        vector ( id = 52, optional, fill = "SPI2_IRQHandler" );                 // SPI2
-                        vector ( id = 53, optional, fill = "USART1_IRQHandler" );               // USART1
-                        vector ( id = 54, optional, fill = "USART2_IRQHandler" );               // USART2
-                        vector ( id = 55, optional, fill = "USART3_IRQHandler" );               // USART3
-                        vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" );            // EXTI Line 15..10
-                        vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" );             // RTC Alarm through EXTI Line
-                        vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" );            // USB Wakeup from suspend
-                }
-}
-# endif
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210C-EVAL/link_offset.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210C-EVAL/link_offset.lnk
deleted file mode 100644
index 3f877d3..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210C-EVAL/link_offset.lnk
+++ /dev/null
@@ -1,5 +0,0 @@
--d"./settings/STM32F10x_offset.lsl"
---optimize=0
---map-file-format=2
-$(LinkObjects)
---output=.\Objects\$(Target)
\ No newline at end of file
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/STM32F10x_offset.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/STM32F10x_offset.lsl
deleted file mode 100644
index 65789ce..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/STM32F10x_offset.lsl
+++ /dev/null
@@ -1,174 +0,0 @@
-////////////////////////////////////////////////////////////////////////////
-//
-//  File        :  stm32f103_cmsis.lsl
-//
-//  Version     :  @(#)stm32f103_cmsis.lsl      1.2  09/06/04
-//
-//  Description :  LSL file for the STMicroelectronics STM32F103, CMSIS version
-//
-//  Copyright 2009 Altium BV     
-//
-//  NOTE:
-//      This file is derived from cm3.lsl and stm32f103.lsl.
-//      It is assumed that the user works with the ARMv7M architecture.
-//      Other architectures will not work with this lsl file.
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-// We do not want the vectors as defined in arm_arch.lsl
-//
-#define __NO_DEFAULT_AUTO_VECTORS       1
-#define __NR_OF_VECTORS                 76
-
-
-#ifndef __STACK
-#  define __STACK                       8k
-#endif
-#ifndef __HEAP
-#  define __HEAP                        2k
-#endif
-#ifndef __VECTOR_TABLE_ROM_ADDR
-#  define __VECTOR_TABLE_ROM_ADDR       0x08003000
-#endif
-#ifndef __XVWBUF
-#define __XVWBUF                        256             /* buffer used by CrossView */
-#endif
-
-#include <arm_arch.lsl>
-
-////////////////////////////////////////////////////////////////////////////
-//
-// In the STM32F10x, 3 different boot modes can be selected
-// - User Flash memory is selected as boot space
-// - SystemMemory is selected as boot space
-// - Embedded SRAM is selected as boot space
-//
-// This aliases the physical memory associated with each boot mode to Block
-// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
-// the related memory (Flash memory or SRAM) is still accessible at its
-// original memory space.
-//
-// If no memory is defined yet use the following memory settings
-//
-#ifndef __MEMORY
-
-memory stm32f103flash
-{
-    mau = 8;
-    type = rom;
-    size = 504k;
-    map ( size = 504k, dest_offset=0x08003000, dest=bus:ARM:local_bus);
-}
-
-memory stm32f103ram
-{
-    mau = 8;
-    type = ram;
-    size = 64k;
-    map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus);
-}
-
-#endif /* __MEMORY */
-
-section_layout ::linear
-{
-	group( contiguous )
-	{
-		select ".bss.stack";
-		select "stack";
-	}
-}
-
-
-//
-// Custom vector table defines interrupts according to CMSIS standard
-//
-# if defined(__CPU_ARMV7M__)
-section_setup ::linear
-{
-                // vector table with handler addresses
-                vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR,
-                                              template = ".text.handler_address",
-                                              template_symbol = "_lc_vector_handler",
-                                              vector_prefix = "_vector_",
-                                              fill = loop,
-                                              no_inline
-                                            )
-                {
-                         vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work
-                        vector ( id = 1, fill = "_START" );
-                        vector ( id = 2, optional, fill = "NMI_Handler" );
-                        vector ( id = 3, optional, fill = "HardFault_Handler" );
-                        vector ( id = 4, optional, fill = "MemManage_Handler" );
-                        vector ( id = 5, optional, fill = "BusFault_Handler" );
-                        vector ( id = 6, optional, fill = "UsageFault_Handler" );
-                        vector ( id = 11, optional, fill = "SVC_Handler" );
-                        vector ( id = 12, optional, fill = "DebugMon_Handler" );
-                        vector ( id = 14, optional, fill = "PendSV_Handler" );
-                        vector ( id = 15, optional, fill = "SysTick_Handler" );
-
-                        // External Interrupts :
-                        vector ( id = 16, optional, fill = "WWDG_IRQHandler" );                 // Window Watchdog
-                        vector ( id = 17, optional, fill = "PVD_IRQHandler" );                  // PVD through EXTI Line detect
-                        vector ( id = 18, optional, fill = "TAMPER_IRQHandler" );               // Tamper
-                        vector ( id = 19, optional, fill = "RTC_IRQHandler" );                  // RTC
-                        vector ( id = 20, optional, fill = "FLASH_IRQHandler" );                // Flash
-                        vector ( id = 21, optional, fill = "RCC_IRQHandler" );                  // RCC
-                        vector ( id = 22, optional, fill = "EXTI0_IRQHandler" );                // EXTI Line 0
-                        vector ( id = 23, optional, fill = "EXTI1_IRQHandler" );                // EXTI Line 1
-                        vector ( id = 24, optional, fill = "EXTI2_IRQHandler" );                // EXTI Line 2
-                        vector ( id = 25, optional, fill = "EXTI3_IRQHandler" );                // EXTI Line 3
-                        vector ( id = 26, optional, fill = "EXTI4_IRQHandler" );                // EXTI Line 4
-                        vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" );          // DMA Channel 1
-                        vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" );          // DMA Channel 2
-                        vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" );          // DMA Channel 3
-                        vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" );          // DMA Channel 4
-                        vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" );          // DMA Channel 5
-                        vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" );          // DMA Channel 6
-                        vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" );          // DMA Channel 7
-                        vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" );               // ADC1 and ADC2
-                        vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" );        // USB High Priority or CAN1 TX
-                        vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" );       // USB LowPriority or CAN1 RX0
-                        vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" );              // CAN1 RX1
-                        vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" );              // CAN1 SCE
-                        vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" );              // EXTI Line 9..5
-                        vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" );             // TIM1 Break
-                        vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" );              // TIM1 Update
-                        vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" );         // TIM1 Trigger and Commutation
-                        vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" );              // TIM1 Capture Compare
-                        vector ( id = 44, optional, fill = "TIM2_IRQHandler" );                 // TIM2
-                        vector ( id = 45, optional, fill = "TIM3_IRQHandler" );                 // TIM3
-                        vector ( id = 46, optional, fill = "TIM4_IRQHandler" );                 // TIM4
-                        vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" );              // I2C1 Event
-                        vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" );              // I2C1 Error
-                        vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" );              // I2C2 Event
-                        vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" );              // I2C2 Error
-                        vector ( id = 51, optional, fill = "SPI1_IRQHandler" );                 // SPI1
-                        vector ( id = 52, optional, fill = "SPI2_IRQHandler" );                 // SPI2
-                        vector ( id = 53, optional, fill = "USART1_IRQHandler" );               // USART1
-                        vector ( id = 54, optional, fill = "USART2_IRQHandler" );               // USART2
-                        vector ( id = 55, optional, fill = "USART3_IRQHandler" );               // USART3
-                        vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" );            // EXTI Line 15..10
-                        vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" );             // RTC Alarm through EXTI Line
-                        vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" );            // USB Wakeup from suspend
-                        vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" );             // TIM8 Break
-                        vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" );              // TIM8 Update
-                        vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" );         // TIM8 Trigger and Commutation
-                        vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" );              // TIM8 Capture Compare
-                        vector ( id = 63, optional, fill = "ADC3_IRQHandler" );                 // ADC3
-                        vector ( id = 64, optional, fill = "FSMC_IRQHandler" );                 // FSMC
-                        vector ( id = 65, optional, fill = "SDIO_IRQHandler" );                 // SDIO
-                        vector ( id = 66, optional, fill = "TIM5_IRQHandler" );                 // TIM5
-                        vector ( id = 67, optional, fill = "SPI3_IRQHandler" );                 // SPI3
-                        vector ( id = 68, optional, fill = "UART4_IRQHandler" );                // UART4
-                        vector ( id = 69, optional, fill = "UART5_IRQHandler" );                // UART5
-                        vector ( id = 70, optional, fill = "TIM6_IRQHandler" );                 // TIM6
-                        vector ( id = 71, optional, fill = "TIM7_IRQHandler" );                 // TIM7
-                        vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" );        // DMA2 Channel1
-                        vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" );        // DMA2 Channel2
-                        vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" );        // DMA2 Channel3
-                        vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" );      // DMA2 Channel4 and DMA2 Channel5
-                }
-}
-# endif
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/link_offset.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/link_offset.lnk
deleted file mode 100644
index 2d9c35c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210E-EVAL/link_offset.lnk
+++ /dev/null
@@ -1,4 +0,0 @@
--d"./settings/STM32F10x_offset.lsl"
---optimize=0
---map-file-format=2
-$(LinkObjects)
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/STM32F10x_offset.lsl b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/STM32F10x_offset.lsl
deleted file mode 100644
index 3046e73..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/STM32F10x_offset.lsl
+++ /dev/null
@@ -1,173 +0,0 @@
-////////////////////////////////////////////////////////////////////////////
-//
-//  File        :  stm32f103_cmsis.lsl
-//
-//  Version     :  @(#)stm32f103_cmsis.lsl      1.2  09/06/04
-//
-//  Description :  LSL file for the STMicroelectronics STM32F103, CMSIS version
-//
-//  Copyright 2009 Altium BV     
-//
-//  NOTE:
-//      This file is derived from cm3.lsl and stm32f103.lsl.
-//      It is assumed that the user works with the ARMv7M architecture.
-//      Other architectures will not work with this lsl file.
-//
-////////////////////////////////////////////////////////////////////////////
-
-//
-// We do not want the vectors as defined in arm_arch.lsl
-//
-#define __NO_DEFAULT_AUTO_VECTORS       1
-#define __NR_OF_VECTORS                 76
-
-
-#ifndef __STACK
-#  define __STACK                       8k
-#endif
-#ifndef __HEAP
-#  define __HEAP                        2k
-#endif
-#ifndef __VECTOR_TABLE_ROM_ADDR
-#  define __VECTOR_TABLE_ROM_ADDR       0x08003000
-#endif
-#ifndef __XVWBUF
-#define __XVWBUF                        256             /* buffer used by CrossView */
-#endif
-
-#include <arm_arch.lsl>
-
-////////////////////////////////////////////////////////////////////////////
-//
-// In the STM32F10x, 3 different boot modes can be selected
-// - User Flash memory is selected as boot space
-// - SystemMemory is selected as boot space
-// - Embedded SRAM is selected as boot space
-//
-// This aliases the physical memory associated with each boot mode to Block
-// 000 (0x00000000 boot memory). Even when aliased in the boot memory space,
-// the related memory (Flash memory or SRAM) is still accessible at its
-// original memory space.
-//
-// If no memory is defined yet use the following memory settings
-//
-#ifndef __MEMORY
-
-memory stm32f103flash
-{
-    mau = 8;
-    type = rom;
-    size =0xFE000;
-    map ( size = 0xFE000, dest_offset=0x08003000, dest=bus:ARM:local_bus);
-}
-
-memory stm32f103ram
-{
-    mau = 8;
-    type = ram;
-    size = 96k;
-    map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus);
-}
-
-#endif /* __MEMORY */
-
-section_layout ::linear
-{
-	group( contiguous )
-	{
-		select ".bss.stack";
-		select "stack";
-	}
-}
-
-//
-// Custom vector table defines interrupts according to CMSIS standard
-//
-# if defined(__CPU_ARMV7M__)
-section_setup ::linear
-{
-                // vector table with handler addresses
-                vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR,
-                                              template = ".text.handler_address",
-                                              template_symbol = "_lc_vector_handler",
-                                              vector_prefix = "_vector_",
-                                              fill = loop,
-                                              no_inline
-                                            )
-                {
-                         vector ( id = 0, fill = "_stacklabel" ); // FIXME: "_lc_ub_stack" does not work
-                        vector ( id = 1, fill = "_START" );
-                        vector ( id = 2, optional, fill = "NMI_Handler" );
-                        vector ( id = 3, optional, fill = "HardFault_Handler" );
-                        vector ( id = 4, optional, fill = "MemManage_Handler" );
-                        vector ( id = 5, optional, fill = "BusFault_Handler" );
-                        vector ( id = 6, optional, fill = "UsageFault_Handler" );
-                        vector ( id = 11, optional, fill = "SVC_Handler" );
-                        vector ( id = 12, optional, fill = "DebugMon_Handler" );
-                        vector ( id = 14, optional, fill = "PendSV_Handler" );
-                        vector ( id = 15, optional, fill = "SysTick_Handler" );
-
-                        // External Interrupts :
-                        vector ( id = 16, optional, fill = "WWDG_IRQHandler" );                 // Window Watchdog
-                        vector ( id = 17, optional, fill = "PVD_IRQHandler" );                  // PVD through EXTI Line detect
-                        vector ( id = 18, optional, fill = "TAMPER_IRQHandler" );               // Tamper
-                        vector ( id = 19, optional, fill = "RTC_IRQHandler" );                  // RTC
-                        vector ( id = 20, optional, fill = "FLASH_IRQHandler" );                // Flash
-                        vector ( id = 21, optional, fill = "RCC_IRQHandler" );                  // RCC
-                        vector ( id = 22, optional, fill = "EXTI0_IRQHandler" );                // EXTI Line 0
-                        vector ( id = 23, optional, fill = "EXTI1_IRQHandler" );                // EXTI Line 1
-                        vector ( id = 24, optional, fill = "EXTI2_IRQHandler" );                // EXTI Line 2
-                        vector ( id = 25, optional, fill = "EXTI3_IRQHandler" );                // EXTI Line 3
-                        vector ( id = 26, optional, fill = "EXTI4_IRQHandler" );                // EXTI Line 4
-                        vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" );          // DMA Channel 1
-                        vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" );          // DMA Channel 2
-                        vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" );          // DMA Channel 3
-                        vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" );          // DMA Channel 4
-                        vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" );          // DMA Channel 5
-                        vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" );          // DMA Channel 6
-                        vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" );          // DMA Channel 7
-                        vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" );               // ADC1 and ADC2
-                        vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" );        // USB High Priority or CAN1 TX
-                        vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" );       // USB LowPriority or CAN1 RX0
-                        vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" );              // CAN1 RX1
-                        vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" );              // CAN1 SCE
-                        vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" );              // EXTI Line 9..5
-                        vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" );             // TIM1 Break
-                        vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" );              // TIM1 Update
-                        vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" );         // TIM1 Trigger and Commutation
-                        vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" );              // TIM1 Capture Compare
-                        vector ( id = 44, optional, fill = "TIM2_IRQHandler" );                 // TIM2
-                        vector ( id = 45, optional, fill = "TIM3_IRQHandler" );                 // TIM3
-                        vector ( id = 46, optional, fill = "TIM4_IRQHandler" );                 // TIM4
-                        vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" );              // I2C1 Event
-                        vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" );              // I2C1 Error
-                        vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" );              // I2C2 Event
-                        vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" );              // I2C2 Error
-                        vector ( id = 51, optional, fill = "SPI1_IRQHandler" );                 // SPI1
-                        vector ( id = 52, optional, fill = "SPI2_IRQHandler" );                 // SPI2
-                        vector ( id = 53, optional, fill = "USART1_IRQHandler" );               // USART1
-                        vector ( id = 54, optional, fill = "USART2_IRQHandler" );               // USART2
-                        vector ( id = 55, optional, fill = "USART3_IRQHandler" );               // USART3
-                        vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" );            // EXTI Line 15..10
-                        vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" );             // RTC Alarm through EXTI Line
-                        vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" );            // USB Wakeup from suspend
-                        vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" );             // TIM8 Break
-                        vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" );              // TIM8 Update
-                        vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" );         // TIM8 Trigger and Commutation
-                        vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" );              // TIM8 Capture Compare
-                        vector ( id = 63, optional, fill = "ADC3_IRQHandler" );                 // ADC3
-                        vector ( id = 64, optional, fill = "FSMC_IRQHandler" );                 // FSMC
-                        vector ( id = 65, optional, fill = "SDIO_IRQHandler" );                 // SDIO
-                        vector ( id = 66, optional, fill = "TIM5_IRQHandler" );                 // TIM5
-                        vector ( id = 67, optional, fill = "SPI3_IRQHandler" );                 // SPI3
-                        vector ( id = 68, optional, fill = "UART4_IRQHandler" );                // UART4
-                        vector ( id = 69, optional, fill = "UART5_IRQHandler" );                // UART5
-                        vector ( id = 70, optional, fill = "TIM6_IRQHandler" );                 // TIM6
-                        vector ( id = 71, optional, fill = "TIM7_IRQHandler" );                 // TIM7
-                        vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" );        // DMA2 Channel1
-                        vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" );        // DMA2 Channel2
-                        vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" );        // DMA2 Channel3
-                        vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" );      // DMA2 Channel4 and DMA2 Channel5
-                }
-}
-# endif
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/link_offset.lnk b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/link_offset.lnk
deleted file mode 100644
index 2d9c35c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM3210X-XL/link_offset.lnk
+++ /dev/null
@@ -1,4 +0,0 @@
--d"./settings/STM32F10x_offset.lsl"
---optimize=0
---map-file-format=2
-$(LinkObjects)
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/setstack.asm b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/setstack.asm
deleted file mode 100644
index 2c11b4c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/HiTOP/setstack.asm
+++ /dev/null
@@ -1,4 +0,0 @@
-	.section	.bss.stack
-	.global	_stacklabel
-_stacklabel:
-	.endsec
\ No newline at end of file
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/TrueSTUDIO/stm32f10x_flash_offset.ld b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/TrueSTUDIO/stm32f10x_flash_offset.ld
deleted file mode 100644
index 9349b62..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/linker/TrueSTUDIO/stm32f10x_flash_offset.ld
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
-*****************************************************************************
-**
-**  File        : stm32f10x_flash_offset.ld
-**
-**  Abstract    : Linker script for STM32F10x XL-density devices with
-**                1MByte FLASH, 96KByte RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**
-**  Environment : Atollic TrueSTUDIO(R)
-**
-**  Distribution: The file is distributed “as is,” without any warranty
-**                of any kind.
-**
-**  (c)Copyright Atollic AB.
-**  You may use this file as-is or modify it according to the needs of your
-**  project. Distribution of this file (unmodified or modified) is not
-**  permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the
-**  rights to distribute the assembled, compiled & linked contents of this
-**  file as part of an application binary file, provided that it is built
-**  using the Atollic TrueSTUDIO(R) toolchain.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Highest address of the user mode stack */
-_estack = 0x20018000;    /* end of 96K RAM */
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0;      /* required amount of heap  */
-_Min_Stack_Size = 0x200; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-  FLASH (rx)      : ORIGIN = 0x08003000, LENGTH = 1024K - 0x3000
-  RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 96K
-  MEMORY_B1 (rx)  : ORIGIN = 0x60000000, LENGTH = 0K
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-
-   .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
-    .ARM : {
-    __exidx_start = .;
-      *(.ARM.exidx*)
-      __exidx_end = .;
-    } >FLASH
-
-  .ARM.attributes : { *(.ARM.attributes) } > FLASH
-
-  .preinit_array     :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(.fini_array*))
-    KEEP (*(SORT(.fini_array.*)))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = .;
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : AT ( _sidata )
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM
-
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss secion */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  PROVIDE ( end = _ebss );
-  PROVIDE ( _end = _ebss );
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(4);
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(4);
-  } >RAM
-
-  /* MEMORY_bank1 section, code must be located here explicitly            */
-  /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */
-  .memory_b1_text :
-  {
-    *(.mb1text)        /* .mb1text sections (code) */
-    *(.mb1text*)       /* .mb1text* sections (code)  */
-    *(.mb1rodata)      /* read-only data (constants) */
-    *(.mb1rodata*)
-  } >MEMORY_B1
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-}
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.c
deleted file mode 100644
index 849726c..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/VectorTable_Relocation/main.c 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Main program body.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Examples
-  * @{
-  */
-
-/** @addtogroup NVIC_VectorTable_Relocation
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-static __IO uint32_t TimingDelay;
-
-/* Private function prototypes -----------------------------------------------*/
-void Delay(__IO uint32_t nTime);
-
-/* Private functions ---------------------------------------------------------*/
-
-/**
-  * @brief  Main program.
-  * @param  None
-  * @retval None
-  */
-int main(void)
-{
-  /*!< At this stage the microcontroller clock setting is already configured, 
-       this is done through SystemInit() function which is called from startup
-       file (startup_stm32f10x_xx.s) before to branch to application main.
-       To reconfigure the default setting of SystemInit() function, refer to
-       system_stm32f10x.c file
-     */     
-       
-  /* Initialize Leds mounted on STM3210X-EVAL board */
-  STM_EVAL_LEDInit(LED1);
-  STM_EVAL_LEDInit(LED2);
-  STM_EVAL_LEDInit(LED3);
-  STM_EVAL_LEDInit(LED4);
-
-  /* Turn on LED1 and LED3 */
-  STM_EVAL_LEDOn(LED1);
-  STM_EVAL_LEDOn(LED3);
-
-  /* Setup SysTick Timer for 1 msec interrupts  */
-  if (SysTick_Config(SystemCoreClock / 1000))
-  { 
-    /* Capture error */ 
-    while (1);
-  }
-  
-  while (1)
-  {
-    /* Toggle LED1, LED2, LED3 and LED4 */
-    STM_EVAL_LEDToggle(LED1);
-    STM_EVAL_LEDToggle(LED2);
-    STM_EVAL_LEDToggle(LED3);    
-    STM_EVAL_LEDToggle(LED4);
-
-    /* Insert 500 ms delay */
-    Delay(500);
-
-    /* Toggle LED1, LED2, LED3 and LED4 */
-    STM_EVAL_LEDToggle(LED1);
-    STM_EVAL_LEDToggle(LED2);
-    STM_EVAL_LEDToggle(LED3);    
-    STM_EVAL_LEDToggle(LED4);
-
-    /* Insert 300 ms delay */
-    Delay(300);
-  }
-}
-
-/**
-  * @brief  Inserts a delay time.
-  * @param  nTime: specifies the delay time length, in milliseconds.
-  * @retval None
-  */
-void Delay(__IO uint32_t nTime)
-{
-  TimingDelay = nTime;
-
-  while(TimingDelay != 0)
-  {
-  }
-}
-
-/**
-  * @brief  Decrements the TimingDelay variable.
-  * @param  None
-  * @retval None
-  */
-void TimingDelay_Decrement(void)
-{
-  if (TimingDelay != 0x00)
-  { 
-    TimingDelay--;
-  }
-}
-
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(uint8_t* file, uint32_t line)
-{ 
-  /* User can add his own implementation to report the file name and line number,
-     ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-
-  /* Infinite loop */
-  while (1)
-  {
-  }
-}
-
-#endif
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.h
deleted file mode 100644
index 6ad4c41..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/main.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/VectorTable_Relocation/main.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Header for main.c module
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __MAIN_H
-#define __MAIN_H
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-#include "stm32_eval.h"
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-void TimingDelay_Decrement(void);
-
-#endif /* __MAIN_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_conf.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_conf.h
deleted file mode 100644
index e823189..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_conf.h
+++ /dev/null
@@ -1,77 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/VectorTable_Relocation/stm32f10x_conf.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Library configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */ 
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_CONF_H
-#define __STM32F10x_CONF_H
-
-/* Includes ------------------------------------------------------------------*/
-/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */
-#include "stm32f10x_adc.h"
-#include "stm32f10x_bkp.h"
-#include "stm32f10x_can.h"
-#include "stm32f10x_cec.h"
-#include "stm32f10x_crc.h"
-#include "stm32f10x_dac.h"
-#include "stm32f10x_dbgmcu.h"
-#include "stm32f10x_dma.h"
-#include "stm32f10x_exti.h"
-#include "stm32f10x_flash.h"
-#include "stm32f10x_fsmc.h"
-#include "stm32f10x_gpio.h"
-#include "stm32f10x_i2c.h"
-#include "stm32f10x_iwdg.h"
-#include "stm32f10x_pwr.h"
-#include "stm32f10x_rcc.h"
-#include "stm32f10x_rtc.h"
-#include "stm32f10x_sdio.h"
-#include "stm32f10x_spi.h"
-#include "stm32f10x_tim.h"
-#include "stm32f10x_usart.h"
-#include "stm32f10x_wwdg.h"
-#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Uncomment the line below to expanse the "assert_param" macro in the 
-   Standard Peripheral Library drivers code */
-/* #define USE_FULL_ASSERT    1 */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function which reports 
-  *         the name of the source file and the source line number of the call 
-  *         that failed. If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0)
-#endif /* USE_FULL_ASSERT */
-
-#endif /* __STM32F10x_CONF_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.c b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.c
deleted file mode 100644
index 6b81deb..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/VectorTable_Relocation/stm32f10x_it.c 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   Main Interrupt Service Routines.
-  *          This file provides template for all exceptions handler and peripherals
-  *          interrupt service routine.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x_it.h"
-#include "main.h"
-
-/** @addtogroup STM32F10x_StdPeriph_Examples
-  * @{
-  */
-
-/** @addtogroup NVIC_VectorTable_Relocation
-  * @{
-  */
-
-/* Private typedef -----------------------------------------------------------*/
-/* Private define ------------------------------------------------------------*/
-/* Private macro -------------------------------------------------------------*/
-/* Private variables ---------------------------------------------------------*/
-/* Private function prototypes -----------------------------------------------*/
-/* Private functions ---------------------------------------------------------*/
-
-/******************************************************************************/
-/*            Cortex-M3 Processor Exceptions Handlers                         */
-/******************************************************************************/
-
-/**
-  * @brief  This function handles NMI exception.
-  * @param  None
-  * @retval None
-  */
-void NMI_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles Hard Fault exception.
-  * @param  None
-  * @retval None
-  */
-void HardFault_Handler(void)
-{
-  /* Go to infinite loop when Hard Fault exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles Memory Manage exception.
-  * @param  None
-  * @retval None
-  */
-void MemManage_Handler(void)
-{
-  /* Go to infinite loop when Memory Manage exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles Bus Fault exception.
-  * @param  None
-  * @retval None
-  */
-void BusFault_Handler(void)
-{
-  /* Go to infinite loop when Bus Fault exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles Usage Fault exception.
-  * @param  None
-  * @retval None
-  */
-void UsageFault_Handler(void)
-{
-  /* Go to infinite loop when Usage Fault exception occurs */
-  while (1)
-  {
-  }
-}
-
-/**
-  * @brief  This function handles SVCall exception.
-  * @param  None
-  * @retval None
-  */
-void SVC_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles Debug Monitor exception.
-  * @param  None
-  * @retval None
-  */
-void DebugMon_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles PendSV_Handler exception.
-  * @param  None
-  * @retval None
-  */
-void PendSV_Handler(void)
-{
-}
-
-/**
-  * @brief  This function handles SysTick Handler.
-  * @param  None
-  * @retval None
-  */
-void SysTick_Handler(void)
-{
-  TimingDelay_Decrement();
-}
-
-/******************************************************************************/
-/*                 STM32F10x Peripherals Interrupt Handlers                   */
-/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
-/*  available peripheral interrupt handler's name please refer to the startup */
-/*  file (startup_stm32f10x_xx.s).                                            */
-/******************************************************************************/
-
-/**
-  * @brief  This function handles PPP interrupt request.
-  * @param  None
-  * @retval None
-  */
-/*void PPP_IRQHandler(void)
-{
-}*/
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
diff --git a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.h b/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.h
deleted file mode 100644
index f649072..0000000
--- a/tmp/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/NVIC/VectorTable_Relocation/stm32f10x_it.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    NVIC/VectorTable_Relocation/stm32f10x_it.h 
-  * @author  MCD Application Team
-  * @version V3.5.0
-  * @date    08-April-2011
-  * @brief   This file contains the headers of the interrupt handlers.
-  ******************************************************************************
-  * @attention
-  *
-  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
-  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
-  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
-  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
-  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
-  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
-  *
-  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F10x_IT_H
-#define __STM32F10x_IT_H
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32f10x.h"
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-
-#endif /* __STM32F10x_IT_H */
-
-/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/