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* registering a target event twice caused infinite loop. Same bug as in jtag/co...oharboe2009-09-111-4/+9
* syntax error fixoharboe2009-09-111-0/+1
* Alexei Babich <a.babich@rez.ru> cleanupoharboe2009-09-112-7/+28
* Nicolas Pitre <nico@cam.org> tighten error checking in bulk_writeoharboe2009-09-111-4/+15
* eol-style:nativeoharboe2009-09-100-0/+0
* Alexei Babich <a.babich@rez.ru> imx31 nand flash controller supportoharboe2009-09-104-2/+1004
* Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte acc...oharboe2009-09-101-0/+12
* michal smulski <michal.smulski@ooma.com> telo target/board scriptsoharboe2009-09-105-30/+1396
* Rolf Meeser <rolfm_9dq@yahoo.de> oharboe2009-09-092-6/+44
* - Fix bug-in-waiting when adding more than one TAP event typeoharboe2009-09-091-4/+10
* David Brownell <david-b@pacbell.net> oharboe2009-09-095-8/+27
* David Brownell <david-b@pacbell.net> oharboe2009-09-091-4/+14
* Report correct core instruction state for ARMv/A targetsmlu2009-09-081-1/+1
* Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu2009-09-081-2/+7
* David Brownell <david-b@pacbell.net> oharboe2009-09-082-0/+103
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-35/+137
* Improved handling of instruction set state, helps for debugging Thumb state.mlu2009-09-071-7/+5
* Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in mi...oharboe2009-09-041-44/+0
* use "armv4_5 core_state arm" instead of soft_reset_halt, fewer side effectsoharboe2009-09-043-4/+5
* Dirk Behme <dirk.behme@googlemail.com> retire jtag_speed usageoharboe2009-09-041-2/+0
* Dirk Behme <dirk.behme@googlemail.com> Add default fall back freqency.oharboe2009-09-041-0/+3
* set ARM mode using explicit command rather than soft_reset_halt which has lot...oharboe2009-09-041-1/+1
* Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.oharboe2009-09-041-0/+7
* more debug output for breakpointsoharboe2009-09-041-2/+10
* Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR registeroharboe2009-09-042-6/+15
* David Brownell <david-b@pacbell.net> "set _TARGETNAME ..." cleanupoharboe2009-09-0445-49/+54
* David Claffey <dnclaffey@gmail.com> get rid of reset recursionoharboe2009-09-041-3/+4
* David Brownelloharboe2009-09-036-74/+191
* David Claffey <dnclaffey@gmail.com> tested with the Atheros reference design ...oharboe2009-09-021-0/+56
* Crusty Code fixes from the tcl directory re-arragementsduane2009-09-023-22/+22
* - fixes the incorrect info msg displayed during stellaris flash programming.ntfreak2009-09-011-2/+2
* - fix a regression when using cortex_m3 emulated dcc channelntfreak2009-09-011-10/+19
* Warning fixduane2009-08-311-0/+3
* Gary Carlson <gcarlson@carlson-minot.com> config fileoharboe2009-08-311-0/+204
* Ferdinand Postema <ferdinand@postema.eu> config script for the MMnet1001 modu...oharboe2009-08-311-0/+83
* David Brownell <david-b@pacbell.net> Minor code bugfix: check right variable.oharboe2009-08-301-1/+1
* Dirk Behme <dirk.behme@googlemail.com> Fix typo in help text. It has to be 'p...oharboe2009-08-301-1/+1
* David Brownell <david-b@pacbell.net> Fix Sandstorm revision checking: right b...oharboe2009-08-301-1/+1
* David Brownell <david-b@pacbell.net> Remove duplicate check for flash write s...oharboe2009-08-301-21/+19
* David Brownell <david-b@pacbell.net> Minor doc updates:oharboe2009-08-301-1/+15
* David Brownell <david-b@pacbell.net> start phasing out integers as target IDsoharboe2009-08-307-61/+62
* David Brownell <david-b@pacbell.net> Be sure the built-in search paths always...oharboe2009-08-304-7/+8
* David Brownell <david-b@pacbell.net> fix warningsoharboe2009-08-281-4/+8
* added arm11 timeout error messagesoharboe2009-08-284-15/+104
* restore ICE watchpoint registers when the *last* software breakpoint is removedoharboe2009-08-282-3/+23
* David Brownell <david-b@pacbell.net> The Stellaris eval boards don't have TRS...oharboe2009-08-284-6/+0
* David Brownell <david-b@pacbell.net> ARM disassembly support for about five d...oharboe2009-08-281-6/+345
* arm11 hardware step using simulation + breakpoint. Use "hardware_step enable"...oharboe2009-08-272-20/+30
* arm11 single stepping wip - at least we know the next PC nowoharboe2009-08-271-0/+4
* arm11 single stepping wipoharboe2009-08-271-0/+101
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