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* lpc2148: redo to the new target configuration schemeØyvind Harboe2010-12-221-46/+41
| | | | | | | | | | | | Define a proc which PCBs can easily override. Also demonstrates how to add multiple TAP exepcted-id's using arguments. Added 0x3f0f0f0f as expected TAP-id. Old LPC2148 silicon I happened to have on my desk? Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* update IXP42x target / XBA board configMichael Schwingen2010-12-192-96/+83
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* Add support for Hilscher netX controllersMichael Trensch2010-12-183-9/+105
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* TCL: fix non TCL commentsAntonio Borneo2010-12-184-75/+75
| | | | | | | | End of line comments fixed with ';' before '#'. Added few additional 'space' to keep indentation in multi-line comments. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* remove srst_pulls_trst from LPC2xxx target scriptsFreddie Chopin2010-12-096-12/+6
| | | | | | LPC2xxx do not require reset_config srst_pulls_trst. This can cause various "strange" problems when flashing the chip, because "reset halt" actually allows the chip to run for some short period of time and execute some code. Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* lpc2478 target config: CCLK as (mandatory) parameterRolf Meeser2010-12-051-4/+7
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* stm32: set default soft reset configSpencer Oliver2010-12-031-0/+4
| | | | | | | If no srst is configured then default to using sysresetreq to reset the target. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* config: fix luminary jtag configSpencer Oliver2010-12-021-3/+0
| | | | | | | When this config was updated in commit e3773e3e3d1f1ee0dbb0b69e8babe8419784d1c1 the old jtag declaration was not removed. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* rename some target scripts to be consistent with the restFreddie Chopin2010-12-023-0/+0
| | | | | | Rename Atmel target scripts which had wrong name ("at91" missing for ARM7 AT91SAM7..., "at" missing for AVR ATmega...) Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
* FLASH/NOR: rename from spearsmi to stmsmiAntonio Borneo2010-11-231-1/+1
| | | | | | | STMicroelectronics controller SMI is not SPEAr specific. Rename it and change name to every symbol in the code. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* STR750: Add SMI interface supportAntonio Borneo2010-11-231-0/+12
| | | | | | | Modified spearsmi driver to include support for STR75x Added missing initialization in tcl file for STR750 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* TCL scripts: replace "puts" with "echo"Antonio Borneo2010-11-097-131/+131
| | | | Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* lpc3131: target definitionAndrew Leech2010-11-091-0/+76
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* TCL scripts: add support for ST SPEAr310Antonio Borneo2010-11-061-0/+41
| | | | | | | | | | Initial support for ST SPEAr310 and for the evaluation board EVALSPEAr310 Rev. 2.0. Scripts are split in generic for SPEAr3xx family and specific for SPEAr310. This should easily allow adding new members of the family. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* CortexA8: Introduce Freescale i.MX51 variantMarek Vasut2010-11-051-0/+51
| | | | | | | | | | | This patch introduces support for Cortex A8 based Freescale i.MX51 CPU. This CPU has the Debug Access Port located at a different address (0x60008000) than TI OMAP3 series of CPUs. i.MX51 configuration file based on OMAP3 configuration file and an email from Alan Carvalho de Assis <acassis@gmail.com>. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* Make systesetreq typos read sysresetreq insteadPeter Stuge2010-10-251-1/+1
| | | | Signed-off-by: Peter Stuge <peter@stuge.se>
* Remove srst_pulls_trst from LPC1768 targetPeter Stuge2010-10-251-3/+0
| | | | | | | srst_pulls_trst may be true on some (broken) LPC1768 boards but is not true in general for the LPC1768. Signed-off-by: Peter Stuge <peter@stuge.se>
* swj-dp.tcl (SWD infrastructure #1)David Brownell2010-10-103-1/+44
| | | | | | | | | | | | | | | | | | | | Provide new helper proc that can set up either an SWD or JTAG DAP based on the transport which is in use -- mostly for SWJ-DP. Also update some SWJ-DP based chips/targets to use it. The goal is making SWD-vs-JTAG transparent in most places. SWJ-DP based chips really need this flexible configuration to cope with debug adapters that support different transports, without needing new target configs for each transport or adapter. For JTAG-DP, callers will use "jtag newtap" directly, as today; only one chip-level transport option exists. For SW-DP (e.g. LPC1[13]xx or EFM32, they'll use "swd newdap" directly (part of an upcoming SWD transport patch). Again, only one transport option exists, so hard-wiring is appropriate there. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Fix omap3_dbginit to write to physical memory.Zachary T Welch2010-09-261-1/+1
| | | | | Setting the OMAP3530 DBGEN bit must be done in physical memory, so update omap3_dbginit callback to use the new 'mww phys' command syntax.
* TCL scripts: collect duplicated proceduresAntonio Borneo2010-09-213-35/+3
| | | | | | | | TCL procedures mrw and mmw, originally in DaVinci target code, are duplicated in other TCL scripts. Moved in a common helper file, and added help/usage description. Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
* AM/DM37x: Unify configuration scripts and add support for TI Beagleboard xM.Karl Kurbjun2010-09-201-0/+203
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* board scripts: Marvell PXA270M processor has a new TAPID: 0x89265013Takács Áron2010-09-141-1/+7
| | | | | | | | | | the new Marvell PXA270M processor has a new TAPID: 0x89265013. Attached you will find a patch for target/pxa270.cfg that will handle this. I have also attached a board/colibri.cfg file to support the Colibri PXA270 module by Toradex. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cortex m3: add cortex_m3 reset_config cmdSpencer Oliver2010-08-311-6/+37
| | | | | | | | | | | | This new cmd adds the ability to choose the Cortex-M3 reset method used. It defaults to using SRST for reset if available otherwise it falls back to using NVIC VECTRESET. This is known to work on all cores. Move any luminary specific reset handling to the stellaris cfg file. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* cfg: update Luminary config filesSpencer Oliver2010-08-314-101/+7
| | | | | | | | - Update all Luminary config's to use a common target/stellaris.cfg. - Add Luminary ek-lm3s6965 config. - Increase working area for boards with more ram. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* imx35pdk: fix clock and reset delaysØyvind Harboe2010-08-191-0/+1
| | | | | | Use rclk and 100ms delay on ntrst Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* mcb1700: Keil MCB1700 w/1768 config scriptØyvind Harboe2010-08-171-12/+4
| | | | | | Ca. 93kBytes/s flashing speed @ 10MHz JTAG clock Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* avr32: basic target scriptOleksandr Tymoshenko2010-08-151-0/+18
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* at32ap7000 config fileDavid Brownell2010-08-151-0/+16
| | | | nice board to play with.
* lpc1768: turn down the jtag clockØyvind Harboe2010-08-131-7/+9
| | | | | | | Tests should that it needs to be as low as 100kHz to be stable. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* DM36x: Set OSCDIV dividerThomas Koeller2010-08-121-0/+7
| | | | | | The ability to set up the OSCDIV divider was missing. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Disable unused SYSCLKsThomas Koeller2010-08-121-1/+20
| | | | | | | | Clear the enable bits for all clocks that are not set explicitly. This is done to increase robustness by removing pre-existing state. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* DM36x: Use enable bit for PLL pre-dividerThomas Koeller2010-08-121-1/+1
| | | | | | | The PLL pre- and postdividers seem to have enable bits, although these are not mentioned in the chip documentation. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
* tcl: remove silly ocd_ prefix to array2mem and mem2arrayØyvind Harboe2010-08-112-5/+5
| | | | | | | | ocd_ prefix is used internally in OpenOCD as a kludge more or less to deal with the two kinds of commands that OpenOCD has. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* config scripts: remove useless reference to OpenOCD docsØyvind Harboe2010-08-118-24/+0
| | | | | | clutters config scripts. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: add omapl138 support and da850evm preliminary supportBen Gardiner2010-08-101-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the omapl138 target and preliminary support for the da850evm. The target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file. I have performed limited testing with this setup. I am posting this patch in the interest of sharing cfg files and in the hopes that the experts on this list can correct errors I have made or point out enhancements. The testing I have performed is debugging uboot with gdb where I also use the following local.cfg and gdbinit files. Debugging appears to work in so much as 'ni' works. local.cfg: gdb_memory_map disable gdbinit: target remote localhost:3333 set remote hardware-breakpoint-limit 2 set remote hardware-watchpoint-limit 2 monitor poll on Comments welcome. Best Regards, Ben Gardiner
* lpc1768: even if rclk "works", it isn't necessarily the correct clkØyvind Harboe2010-08-021-2/+6
| | | | | | rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6). Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* Remove srst_pulls_trst from LPC2148 targetPeter Stuge2010-08-011-1/+1
| | | | | | | | | srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact which is already documented in doc/openocd.texi, so it shouldn't be set unconditionally in the target tcl. This patch was needed to reflash when an Abort exception occured very early after reset, before OpenOCD tried to halt the CPU.
* lpc7168: make flash available upon reset initØyvind Harboe2010-07-301-0/+19
| | | | | | | set user mode to avoid ROM being mapped at address 0 rather than flash. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* lm3s811-ek uses generic stellaris target configDavid Brownell2010-07-171-29/+0
| | | | | | | There's no point in an lm3s811-specific target file, so remove it in favor of the generic "stellaris.cfg". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* cfg: add Avalue RSC-W910 configSpencer Oliver2010-07-131-0/+27
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* at91sam3s* supportOlaf Lüke2010-06-253-36/+73
| | | | Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* DM36x: pll & clock setupThomas Koeller2010-06-151-0/+127
| | | | | | | | Added a function 'pll_v03_setup' to set up PLLs and clock dividers on DM365 and DM368. Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* arm1136 scriptsmichal smulski2010-06-151-1/+2
| | | | | | | | | Here is a patch to fix a startup in C100 (arm1136). Basically make sure that UART is configured before using it. Michal Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
* cfg: add pic32 virtual banksSpencer Oliver2010-05-261-0/+7
| | | | | | make use of the new virtual bank flash driver. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* There are no variants of arm7tdmi targetFreddie Chopin2010-05-247-7/+7
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* All LPC2xxx chips are little endian and that cannot be changed - update ↵Freddie Chopin2010-05-247-53/+8
| | | | | | config scripts Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* add correct CPUTAPID value for LPC2129Freddie Chopin2010-05-241-6/+2
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Update "flash bank" helper comments for LPC2xxx chipsFreddie Chopin2010-05-248-7/+8
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so ↵Freddie Chopin2010-05-241-1/+1
| | | | | | "flash bank" parameter should be 4000 (not 12000) Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* at91sam9260: use RCLKØyvind Harboe2010-05-211-19/+12
| | | | | | | | | | | | | It might be possible to get this target going without RCLK, but it would require more careful analysis and usage of the reset events. Enable fast memory accesses. Tested on an at91sam9260 custom board w/external DRAM and flash. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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