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* ADIv5: cleanup, rename swjdp_transaction_endcheck()David Brownell2010-01-291-4/+4
| | | | | | | | | | | | | | | | Make messages reference "DAP" if they're actually transport-agnostic, or "JTAG-DP" when they're JTAG-specific. Saying SWJ-DP is often wrong (on most Cortex-A8 chips) and is confusing even if correct (since we don't yet support SWD). Rename a JTAG-specific routine to jtagdp_transaction_endcheck() to highlight that it's JTAG-specific, and that identify DAP clients undesirably depending on JTAG. (They will all need to change for SWD support.) Shrink a few overlong lines of code. Copy a comment from code removed in a previous patch (for the ARMv7-M "dap baseaddr" command). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: report lockup, and recoverDavid Brownell2010-01-271-0/+15
| | | | | | | | | | | | ARMv7-M defines a "lockup" state that's entered in certain double fault sequences which can't be recovered from without external help. OpenOCD has previously ignored this. Issue a diagnostic saying the chip has locked up, and force exit from this state by halting the core. It's not clear this is the best way to handle lockup; but there should now be less confusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* BUILD: remove cygwin gcc 3.4.4 build warningsSpencer Oliver2010-01-201-2/+2
| | | | Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* ARMV7M: handle bkpt instruction on resume/stepSpencer Oliver2010-01-201-2/+23
| | | | | | | | | | Skip over a bkpt instruction if found on resume/step. Only software breakpoints known to OpenOCD are currently handled. So this handles the special case of either a user added bkpt or library added, eg. semi-hosting support. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
* Cortex-M3: improved core exception handlingDavid Brownell2010-01-131-21/+24
| | | | | | | | | | | | | | | | | | | | | | This updates three aspects of debugger/exception interactions: - Save the user's "vector_catch" setting, and restore it after reset. Previously, it was obliterated (rather annoyingly) each time. - Don't catch BusFault and HardFault exceptions unless the user says to do so. Target firmware may need to handle them. - Don't modify SHCSR to prevent escalating BusFault to HardFault. Target firmware may expect to handle it as a HardFault. Those simplifications fix several bugs. In one annoying case, OpenOCD would cause the target to lock up on ome faults which triggered after the debugger disconnected. NOTE: a known remaining issue is that OpenOCD can still leave DEMCR set after an otherwise-clean OpenOCD shutdown. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARMv7: help/usage updatesDavid Brownell2010-01-071-6/+6
| | | | | | | | | | | | | | | | | | Provide helptext which was sometimes missing; update some of it to be more accurate. Usage syntax messages have the same EBNF as the User's Guide; there should be no angle brackets in either place. Don't use "&function"; functions are like arrays, their address is their name. Shrink some overlong lines, remove some empties. Add a couple comments about things that should change: those extra TCK cycles for MEM-AP reads are in the wrong place (that might explain some problems we've seen); the DAP command tables should be shared, not copied. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: minor breakpoint cleanupDavid Brownell2010-01-021-12/+25
| | | | | | | Shrink some lines, add some comments, simplify some tests. During debug startup, log the core revision level too. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* streamline and document helptext mode displaysDavid Brownell2010-01-021-1/+1
| | | | | | | | | | | | | | | | | | | Most commands are usable only at runtime; so don't bother saying that, it's noise. Moreover, tokens like EXEC are cryptic. Be more clear: highlight only the commands which may (also) be used during the config stage, thus matching the docs more closely. There are - Configuration commands (per documentation) - And also some commands that valid at *any* time. Update the docs to note that "help" now shows this mode info. This also highlighted a few mistakes in command configuration, mostly commands listed as "valid at any time" which shouldn't have been. This just fixes ones I noted when sanity testing. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: cleanupDavid Brownell2009-12-201-45/+111
| | | | | | | | | | | | Misc: - Introduce some "struct reg" temporaries, for clarity - Shorten lines - Add some missing whitespace - Clean up comments - Add notes about some fault handling issues - Most of these errata workarounds are for *OLD* chip revisions Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: move 'extern' decls to *.h filesDavid Brownell2009-12-081-5/+0
| | | | | | | | The exception being declarations for drivers. Those should be split out in some clean way -- like driver add/remove calls made by initialization code -- but that's for another day. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: list number of HW breakpoints/watchpointsDavid Brownell2009-12-071-0/+6
| | | | | | | | | | | | | | | When starting up, say how many hardware breakpoints and watchpoints are available on various targets. This makes it easier to tell GDB how many of those resources exist. Its remote protocol currently has no way to ask OpenOCD for that information, so it must configured by hand (or not at all). Update the docs to mention this; remove obsolete "don't do this" info. Presentation of GDB setup information is still a mess, but at least it calls out the three components that need setup. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ARM: move opcode macros to <target/arm_opcodes.h>David Brownell2009-12-071-1/+2
| | | | | | | | | | | | | | | Move the ARM opcode macros from <target/armv4_5.h>, and a few Thumb2 ones from <target/armv7m.h>, to more appropriate homes in a new <target/arm_opcodes.h> file. Removed duplicate opcodes from that v7m/Thumb2 set. Protected a few macro argument references by adding missing parentheses. Tightening up some of the line lengths turned up a curious artifact: the macros for the Thumb opcodes are all 32 bits wide, not 16 bits. There's currently no explanation for why it's done that way... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: don't chain "struct arm" commandsDavid Brownell2009-11-281-3/+0
| | | | | | | | | | | | Those commands presume support for the "classic" set of CPU modes (FIQ, supervisor, IRQ, etc) ... which aren't supported by the ARMv7-M or ARMv6-M architectures. They also presume a "struct arm" base type, which this code doesn't use. We haven't cleaned up the register handling enough to be able to share any of those "base" methods. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: uplevel add_{break,watch}point() error checksDavid Brownell2009-11-281-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | In target_type.h it's documented that the target must be halted for add_breakpoint() ... and with slight ambiguity, also for its add_watchpoint() sibling. So rather than verifying that constraint in the CPU drivers, do it in the target_add_{break,watch}point() routines. Add minor paranoia on the remove_*point() paths too: save the return value, and print it out in in the LOG_DEBUG message in case it's nonzero. Note that with some current cores, like all ARMv7 ones I've looked at, there's no technical issue preventing watchpoint or breakpoint add/remove operations on active cores. This model seems deeply wired into OpenOCD though. ALSO: the ARM targets were fairly "good" about enforcing that constraint themselves. The MIPS ones were relied on other code to catch such stuff, but it's not clear such code existed ... keep an eye out for new issues on MIPS. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* remove target_type register_command callbackZachary T Welch2009-11-241-7/+7
| | | | | | Uses chaining of command_registration structures to eliminate all target_type register_callback routines. Exports the command_handler registration arrays for those target types that are used by others.
* cortex_m3: use register_commands()Zachary T Welch2009-11-241-19/+36
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* use COMMAND_REGISTER macroZachary T Welch2009-11-241-4/+4
| | | | | Replaces direct calls to register_command() with a macro, to allow its parameters to be changed and callers updated in phases.
* target: create/use register_cache_invalidate()David Brownell2009-11-191-5/+6
| | | | | | | | | | | | | | | Create a generic register_cache_invalidate(), and use it to replace three all-but-identical core-specific routines: - armv4_5_invalidate_core_regs() - armv7m_invalidate_core_regs - mips32_invalidate_core_regs() too. Make cache->num_regs be unsigned, avoiding various errors. Net code shrink and simplification. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* use COMMAND_PARSE_ON_OFF where appropriateZachary T Welch2009-11-181-12/+5
| | | | Updates all command parsing of "on" and "off" arguments.
* ARM: only use one set of dummy FPA registersDavid Brownell2009-11-171-0/+3
| | | | | | | | | | | | | | | | All ARM cores need to provide obsolete FPA registers in their GDB register dumps. (Even though cores with floating point support now generally use some version of VFP...) Clean up that support a bit by sharing the same dummy registers, and removing the duplicate copies. Eventually we shouldn't need to export those dummies. (This makes the ARMv7-M support include the armv4_5 header, and cleans up related #includes, but doesn't yet use anything from there except those dummies.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_handler: change 'cmd_ctx' to CMD_CTXZachary T Welch2009-11-171-12/+15
| | | | Convert all command handler 'cmd_ctx' parameter usage with CMD_CTX.
* command_handler: change 'args' to CMD_ARGVZachary T Welch2009-11-171-8/+8
| | | | | This patch converts all instances of 'args' in COMMAND_HANDLER routines to use CMD_ARGV macro.
* command_handler: change to 'argc' to CMD_ARGCZachary T Welch2009-11-171-7/+7
| | | | | This patch converts all instances of 'argc' in COMMAND_HANDLER routines to use CMD_ARGC.
* target: simplify register get/set opsDavid Brownell2009-11-171-6/+5
| | | | | | | | | | | No need to indirect from registered integers to pointers. Just stash the pointers directly in the register struct, and don't even bother registering. This is a small code shrink, speeds register access just a smidgeon, and gets rid of another rude exit() path. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: don't exit()David Brownell2009-11-161-24/+10
| | | | | | | Get rid of undesirable and needless exit() calls from the Cortex-M3 support. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* move ARRAY_SIZE macro to types.hZachary T Welch2009-11-161-5/+2
| | | | | | | | The ARRAY_SIZE macro was defined in several target files, so move it to types.h. This patch also removes two other identical macros: DIM (from jtag.h) and asizeof (from arm11.h).
* target: no implicit #includes of "register.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | | Same deal: "register.h" got needlessly included all over the place because of being in a few widely included headers. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Also, don't need that extra "types.h" inclusion. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* target: don't implicitly include "breakpoint.h"David Brownell2009-11-161-0/+1
| | | | | | | | | | | Most files in the tree seem to have ended up including this, and *quite* needlessly ... only code implementing or using breakpoints actually needs these declarations. So take it out of the header files which included it, and put it in files which use it ... reduce needless interdependencies. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* command_t -> struct commandZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct command.
* command_context_t -> struct command_contextZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-45/+45
| | | | Remove misleading typedef and redundant suffix from struct target.
* reg_t -> struct regZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct reg.
* target_type_t -> struct target_typeZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct target_type.
* cortex_m3_dwt_comparator_t -> struct cortex_m3_dwt_comparatorZachary T Welch2009-11-131-5/+5
| | | | Remove misleading typedef and redundant suffix from struct cortex_m3_dwt_comparator.
* cortex_m3_fp_comparator_t -> struct cortex_m3_fp_comparatorZachary T Welch2009-11-131-4/+4
| | | | Remove misleading typedef and redundant suffix from struct cortex_m3_fp_comparator.
* breakpoint_t -> struct breakpointZachary T Welch2009-11-131-9/+9
| | | | Remove misleading typedef and redundant suffix from struct breakpoint.
* arm_instruction_t -> struct arm_instructionZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct arm_instruction.
* reg_cache_t -> struct reg_cacheZachary T Welch2009-11-131-1/+1
| | | | Remove misleading typedef and redundant suffix from struct reg_cache.
* cortex_m3_common_t -> struct cortex_m3_commonZachary T Welch2009-11-131-26/+26
| | | | Remove misleading typedef and redundant suffix from struct cortex_m3_common.
* watchpoint_t -> struct watchpointZachary T Welch2009-11-131-5/+5
| | | | Remove misleading typedef and redundant suffix from struct watchpoint.
* armv7m_common_t -> struct armv7m_commonZachary T Welch2009-11-131-12/+12
| | | | Remove misleading typedef and redundant suffix from struct armv7m_common.
* swjdp_common_t -> struct swjdp_commonZachary T Welch2009-11-131-21/+21
| | | | Remove misleading typedef and redundant suffix from struct swjdp_common.
* jtag_tap_t -> struct jtag_tapZachary T Welch2009-11-131-1/+1
| | | | | Search and destroy the jtag_tap_t typedef. This also cleans up a layering violation, removing the declaration from types.h.
* add CMD_NAME macro for command handlersZachary T Welch2009-11-131-1/+1
| | | | | By introducing the CMD_NAME macro, this parameter may be integrated as args[-1] in command.[ch], without touching any other call sites.
* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-9/+3
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* change argv to args in command handlersZachary T Welch2009-11-111-5/+5
| | | | | | | | | | | Subsequent patches expect all command handlers to use a uniform parameter naming scheme. In the entire tree, these two files used standard 'argv' instead of our non-standard 'args'. This patch opts to reduces the noise required to unify the command handlers, using dominant 'args' form. A future patch may be used to convert us back to the standard argv, but that requires coordination with all developers to minimize disruptions.
* Revert "target: add target->type->has_mmu fn"David Brownell2009-11-091-7/+0
| | | | | | | | | | | | | | | | This patch introduced a bug preventing flash writes from working on Cortex-M3 targets like the STM32. Moreover, it's the wrong approach for handling no-MMU targets. The right way to handle no-MMU targets is to provide accessors for physical addresses, and use them everywhere; and any code which tries to work with virtual-to-physical mappings should use a identity mapping (which can be defaulted). And ... we can tell if a target has an MMU by seeing if it's got an mmu() method. No such methood means no MMU. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: fix (debug) message priorityDavid Brownell2009-11-081-1/+1
| | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Cortex-M3: use the new inheritance/nesting schemeDavid Brownell2009-11-051-104/+88
| | | | | | | | | | | | Use new target_to_cm3() and target_to_armv7m() inlines, instead of a series of x->arch_info conversions. Remove arch_info, since nothing uses it. Also fix an omission: the Cortex-M3 commands didn't verify that they were operating on that kind of target. Add comment about the ARMv7M version of that omission. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Improve cortex_m3 command argument parsing.Zachary T Welch2009-11-051-6/+2
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